Reduced instruction set computer (RISC) architecture
A fundamental reimagining of microprocessors changed the course of high-performance computing
John Cocke displays the interior of the IBM 801 minicomputer, the first prototype computer to use RISC

In the early 1970s, telephone calls didn’t instantly bounce between handheld devices and cell towers. Back then, the connection process required human operators to laboriously plug cords into the holes of a switchboard. Come 1974, a team of IBM researchers led by John Cocke set out in search of ways to automate the process. They envisioned a telephone exchange controller that would connect 300 calls per second (1 million per hour). Hitting that mark would require tripling or even quadrupling the performance of the company’s fastest mainframe at the time — which would require fundamentally reimagining high-performance computing.

The exchange controller project may have been canceled before it got off the ground, but the team’s underlying work led to the microprocessor architecture called RISC, for reduced instruction set computer. RISC enabled computers to complete tasks using simplified instructions, as quickly as possible. The goal to streamline hardware could be achieved with instruction sets composed of fewer steps for loading, evaluating and storing operations.

The new architecture enabled computers to run much faster than ever before. Its protocols, the foundation of computer evolution up to the present day, have affected everything from PCs and mobile devices to gaming and space travel. Just about all microprocessors derive from RISC architecture, and it is the basis of the multibillion-dollar UNIX systems market.

 

Team RISC John Cocke Frances Allen George Radin
A team of IBM luminaries
Cocke, Radin, Birnbaum and Allen

The RISC team included many IBM emerging luminaries, such as Joel Birnbaum, director of computer sciences; George Radin, who managed the group of engineers who produced the first RISC computer; and Frances Allen, who became the first female IBM Fellow and the first woman to receive the Turing Award. But Cocke was the driving force.

Grasping the revolutionary nature of RISC requires first understanding the nature of computing circa 1970. In the 1970s, computers relied on the complex instruction set computer (CISC) architecture. Under CISC, a computer would execute individual commands for any number of low-level operations, such as “load from memory” or arithmetic operations. This system required engineers to insert complicated commands directly into the hardware. So a microprocessor, for example, would come with its own instruction set.

Cocke’s team slashed the size of the instruction set by identifying and eliminating certain instructions that were never used. Under their new design, the central processing unit (CPU) could execute a more limited set of instructions far more quickly. With CISC, tasks such as accessing or writing data typically required multiple machine cycles, whereas RISC could complete the same assignment with a single electronic pulse in half the total time. RISC also made possible a pipelining process whereby instructions are organized in an assembly line manner so that various tasks — like fetching and decoding — can be executed simultaneously.

 

The mantra for RISC development
Don’t add complexity unless it pays for itself

The new architecture’s efficiency was based on a kind of “true-cost” computational accounting. “The main idea,” explained Birnbaum, “is not to add any complexity to the machine unless it pays for itself by how frequently you would use it.”

Cocke’s expertise in the interrelationships between hardware and software gave him a unique perspective into computational development and fueled his team’s breakthroughs. He was famous for chain-smoking his way through IBM’s offices, querying researchers across various fields about their work and ambitions, and renowned for his expansive intellect. Paul Horn, the onetime senior VP and director of IBM Research, said: “John Cocke knew as much about high-energy physics as I did, and it wasn’t even his field.”


The main idea is not to add any complexity to the machine unless it pays for itself Joel Birnbaum Director of computer sciences

In 1980, Cocke’s team produced a prototype computer that showcased for the first time RISC architecture — named the IBM 801, after the number of the building where it was created — giving it simple instructions that could be executed in one cycle. Its CPU was used in IBM hardware and then introduced as the IBM ROMP processor in the IBM RISC Technology Personal Computer in 1986. (ROMP was an acronym for Research Office Products Division Micro Processor.)

Concurrent with development of the 801, two other groups sponsored by the US Department of Defense Advanced Research Projects Agency (DARPA) were working on similar projects. One was at the University of California, Berkeley, under the direction of David Patterson and Carlo H. Séquin, who coined the name RISC. The other was led by John L. Hennessy at Stanford University.

The RISC legacy
From Apple to NASA to Blue Gene

Although the RISC-driven PC didn’t meet with much success, it led to subsequent advancements of the microprocessor. In 1990, IBM released the RISC System/6000, later shortened to IBM RS/6000, which was the progenitor of the high-performance, low-energy-consumption line of IBM Power Systems. It used multi-chip architecture, allowing for a family of workstations and servers that brought unprecedented power to the desks of scientists and engineers, among others.

To spur RISC adoption in the market, IBM formed an alliance with Apple and Motorola (dubbed AIM) to develop a single-chip microprocessor family based on the IBM Power architecture. In 1993, the AIM alliance introduced the PowerPC. Known today as Power ISA, it debuted in the Apple Power Macintosh 6100 and retains a strong presence within gaming systems, cars and communication devices.

 

RISC processors have since become far more powerful than many initially predicted they could be. IBM’s RISC-based processors have been used in servers and routers, engines, jet control systems and even spacecraft — an IBM Power processor was used in the onboard computer of NASA’s Mars Pathfinder from 1996 to 1997. IBM also uses RISC-based processors in all of its supercomputers. The IBM Blue Gene series and Watson (which famously defeated two Jeopardy! champions in 2011) feature Power processors, as does the Summit supercomputer. Cell Broadband Engine Architecture, developed by IBM, Sony Group and Toshiba Corporation, is also based on RISC. (The first Cell-based supercomputer, the IBM Roadrunner, broke the petaflop barrier, reaching a processing speed of 1.026 petaflops in 2008.)

In recognition of his contributions, Cocke received the Association for Computing Machinery’s Turing Award in 1987, the US National Medal of Technology in 1991, and the US National Medal of Science in 1994. He died in 2002, at the age of 77.

 

 

Related stories John Cocke

A prolific inventor in RISC, speech recognition and data storage

Frances Allen

The first woman to win the Turing Award, and the first female IBM Fellow, she scaled the heights of computer science