cmpi (Compare Immediate) instruction
Purpose
Compares the contents of a general-purpose register and a given value algebraically.
Syntax
| Bits | Value |
|---|---|
| 0-5 | 11 |
| 6-8 | BF |
| 9 | / |
| 10 | L |
| 11-15 | RA |
| 16-31 | SI |
See Extended Mnemonics of Fixed-Point Compare Instructions for more information.
Description
The cmpi instruction compares the contents of general-purpose register (GPR) RA and a 16- bit signed integer, SI, as signed integers and sets one of the bits in Condition Register Field BF.
BF can be Condition Register Field 0-7; programmers can specify which Condition Register Field will indicate the result of the operation.
The bits of Condition Register Field BF are interpreted as follows:
| Item | Description | |
|---|---|---|
| Bit | Name | Description |
| 0 | LT | (RA) < SI |
| 1 | GT | (RA) > SI |
| 2 | EQ | (RA) = SI |
| 3 | SO | SO,OV |
The cmpi instruction has one syntax form and does not affect the Fixed-Point Exception Register. Condition Register Field 0 is unaffected unless it is specified as BF by the programmer.
Parameters
| Item | Description |
|---|---|
| BF | Specifies Condition Register Field 0-7 which indicates result of compare. |
| L | Must be set to 0 for the 32-bit subset architecture. |
| RA | Specifies first source general-purpose register for operation. |
| SI | Specifies 16-bit signed integer for operation. |
Examples
The following code compares the contents of GPR 4 and the signed integer 0x11 and sets Condition Register Field 0 to reflect the result of the operation:
# Assume GPR 4 contains 0xFFFF FFE7.
cmpi 0,4,0x11
# The LT bit of Condition Register Field 0 is set.