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Semiconductor Assembly and Test Services
IBM develops chiplet and advanced packaging technology capabilities to supercharge innovations for AI and logic.
By bringing multiple technologies together at the package level to increase performance and reduce cost, our frameworks enable a new paradigm for semiconductor innovations as well as a new pathway to meet AI’s increasing performance demands.
IBM’s Bromont, Canada facility transforms the world’s most advanced semiconductors into state-of-the-art microelectronic components that are used in the entire line of IBM systems as well as in a wide range of products produced by its OEM customers.
With over 50 years of package assembly and test experience, Bromont is the largest Outsourced Semiconductor Assembly and Test (OSAT) facility in North America and one of the largest exporters in Canada, manufacturing over 100,000 advanced flip chip modules each week.
fcBGA and SiP focus
Design
Characterization
Modeling
CPO - CSPO Turnkey Solution
CPO Development Highlights
1972: Bromont site inauguration
1996: Worldwide supplier for gaming console processors
2016: z13 system - 8 core chip 5,2Ghz on organic
2018: SiP, small cards – Z program – encryption hardware
2022: 50 year anniversary
ITAR
Controlled Unclassified Information (CUI)
SECRET
Full process flow capability from materials synthesis at MRL all the way through to assembly and test, Focused on enabling 3DHI technology with hybrid bonding, HD substrate enablement and DBHi bridge technology. IBM Bromont and OEM use 50 years of manufacturing experience serving both IBM and external customers for advanced flip ship, SiP and test production.
Abundance of clean energy
Clean energy grid
Plentiful water supply
Government commitment to sustainability
IBM's development labs located in the Northeast Corridor drive semiconductor technology innovation for the future of computing.
The largest industrial research organization in the world, home to over 1,500 scientists, engineers and designing what's next in computing.
100,000 square feet of semiconductor fab space, with many of the industry's biggest breakthroughs coming from this site.
IBM Bromont leverages its partnership with C2MI to take advantage of state of the art equipment from over 70 equipment manufacturers.
As demand for chips continues to surge from AI and cloud computing advances, the Canadian and Quebec governments are partnering with IBM to solidify the future of the chip supply chain in North America by advancing the assembly, testing and packaging capabilities at IBM's plant in Bromont, Quebec. Among the three entities, they will invest up to CAD187 million in advancing the assembly, testing, and packaging capabilities at the plant, enabling IBM to further its research and development of methods for scalable manufacturing and other advanced assembly processes.
Bromont is embarking on a journey of digital transformation, set to launch in May 2024, to elevate their semiconductor packaging and testing processes to the forefront of smart manufacturing. This initiative will build a robust data fabric foundation, facilitating the integration of advanced AI/ML technologies. The smart factory will enable predictive and real-time monitoring for quality inspections and utilize big data analytics to proactively predict equipment failures. A control tower will also be implemented to centralize critical data and insights, enabling informed decision-making across management levels. With these enhancements in asset performance and quality management, Bromont aims to improve operational efficiency and reliability, setting a new standard in the industry.
Phase 1 aims to increase the assembly and test capacity of advanced fcBGA packaging technologies, while also adding capacity for Si Photonics technologies assembly. Phase 1.5 of the expansion plan will add wafer bumping and fan-out wafer-level packaging capabilities by 2H 2026. This addition will create a complete North American solution for both R&D and high-volume manufacturing that leverages collaboration with IBM's research centers for lab-to-fab synergies. Furthermore, IBM is working with development partner C2MI, located beside IBM Bromont, to finalize plans to add wafer finishing operations for 2.5D Si Interposer and 3D solutions. Production for this addition to the C2MI site is also scheduled for 2H 2026.
If you’ve ever read anything about semiconductors, you’ve probably seen a photo of someone holding up a wafer. They’re silicon disks containing hundreds of future computer chips.
We’re developing new materials for both the smallest length scale (<20nm) and largest length scale (>20mm) of semiconductor fabrication.
Researchers at IBM and ASMPT have hit a milestone with a hybrid bonding technology that drastically reduces the I/O interconnection size of bonding needed between two chiplets, paving the way for a myriad of new computer chip designs.