How to squeeze billions of transistors onto a computer chip
Mukesh Khare, vice president IBM Research Semiconductor Group
Mukesh Khare, vice president IBM Research Semiconductor Group
For decades, the number of tiny transistors studding integrated circuit chips has doubled every two years. That phenomenon — which became known as Moore’s Law — meant faster, more powerful computers. But in recent years the progression has been slowed, some say stopped, by the laws of physics. Increasing the number of circuits on silicon chips, say critics, has reached its limits, and computing will stall at its current level until a substitute approach can be found.
Mukesh Khare disagrees. Khare, who’s responsible for all semiconductor research at IBM, believes the challenges of physics can be overcome. He sees a promising future for adding lots more transistors, the minute engines of computation.
Should we care? Absolutely, says Khare. As electronic devices become smaller and more ubiquitous, “putting more transistors on a chip is the way we can continue to bring more value, more functionality, lower cost and lower power consumption,” he explains. And they’re critical for big computer systems as well. “From a systems perspective, we continue to put more and more transistors on a chip so we can have more and more complex functions, integrate them to increase performance of our systems and reduce power.”
So, what about those laws of physics? Well, in the march toward ever-smaller chips, simply shrinking the transistors is not a solution. As they get smaller, they become much harder to imprint on the chips. And their very scale and proximity can affect electrical properties. Signals can “bleed” more easily between them, for example.
“Now it’s all about introducing new materials, new structures, new innovations,” Khare says. “It’s about innovation, not scaling. At a physical level, we still want to make things smaller, but how we do that requires very different concepts and ideas at more fundamental and materials level… it used to be more [about] geometry.”
With that approach, Khare’s team, partnering with GLOBALFOUNDRIES and Samsung at SUNY Polytechnic Institute’s Colleges of Nanoscale Science and Engineering (SUNY Poly CNSE), accomplished that. In July 2015, they unveiled the semiconductor industry’s first 7 nm (nanometer) test chips with functioning transistors. That breakthrough could result in being able to place more than 20 billion transistors on a fingernail-size chip. That’s roughly 10 times as many as are found on today’s chips.
Putting that further into perspective, consider that most of the chips in use today use 22 nm or 14 nm technology. So the new transistors are at least half the current size. And we’re talking really small — 100,000 times smaller than the width of a human hair and about two and half times the circumference of a strand of your DNA.
At the end of the day, it’s the speed at which these structures operate that matters.
Going beyond the 7 nm laboratory breakthrough was not without challenges, admits Khare. “One front is being able to build these structures, to be able to etch them and make them physically viable,” he says. “The other part is the electrical aspect. Can these transistors perform? They need to be able to switch on and off and have the proper transistor performance. At the end of the day, it’s the speed at which they operate that matters. Can we increase their speed not only by physical geometry, which is important, but also by changing the materials that we use, or by changing the chemistry we are using to coat and etch these films?”
To answer those questions, the research team came up with some novel processes and techniques. In production, transistors are “printed” on a silicon wafer through a complex process called lithography. To produce the 7 nm chip, the team employed a new type of lithography in the manufacturing process, Extreme Ultraviolet, or EUV, which delivers huge improvements over today’s mainstream optical lithography. And they replaced standard silicon with silicon germanium in the channels on the chips that conduct electricity.
It’s all about introducing new materials, new structures, new innovations.
Khare credits the unique partnership and facilities at CNSE with much of the success. He calls it “a dream come true.” The Albany, NY, research center not only has a 24/7 lab, but also, thanks to tooling partners, the capability of a full-fledged “fab,” a research facility with fabrication capabilities. That’s important because the new chips not only have to be small and efficient, they also have to be economically viable. If it costs too much to produce them, they won’t be successful.
“We can scale to actual tooling, so we can ensure we have the right kind of properties that will scale properly,” says Khare. “We can demonstrate capabilities and structure on realistic fab tools.” Of course, that greatly increases confidence that the chips can be produced economically enough to be commercially successful.
But the collaboration extends beyond the tooling capabilities into all areas of advanced logic technology. “IBM research is leading this effort and we work hand in hand with our other partners, particularly GLOBALFOUNDARIES and Samsung. This is something that one cannot do alone. We have to do it together.”
The job is far from over, Khare says, acknowledging, “Seven nanometer still has significant challenges. But research is underway to make even smaller chips. We actually have a have a lot of activity going on beyond 7 nm. This train keeps running.”
“There have been a lot of predictions in the past of the end of semiconductor technology,” he continues. “But with the amount of investment and the number of engineers working on this technology, there’s always a way out; there’s always a path that all these brilliant minds and billions of dollars of investment can find. We are already working on 5 nm technology. That will use many, many additional innovations in both materials and structure. The technology will become harder. It will require more and more new elements and new knowledge.”
And beyond that? He foresees such possibilities as fabricating transistors in three dimensions, stacking circuits atop each other and changing the game by using carbon-based devices. The team is also exploring adding new value to smaller chips such as MRAM or magnetic memory, new ways to interconnect and linking photonics.
“I don’t think this industry is ending,” Khare says. “I think the question is how long will it take to get new chips to the market and at what cost. That is the question.”