Flash BIOS update v1.12 (Linux package) - System x

Download Description

Note: You now have two ways of downloading files with the *.sh extension. You can use either the IBM Download Director, or the HTTP protocol to download these files. Do NOT use FTP as this will only cause the file to open your browser.

• New IBM xSeries firmware and device driver file naming convention
• New firmware update file formats
  

Version 1.12, Build ID: ZUE166A

Problem(s) fixed:

• Fixed operating system time drift, while using HPET.
• Locked Intel VT settings in the CPUs, when disabled.
• Loop on boot sequence instead of waiting for F1 key.
• NMI upon detecting a CPU shutdown due to SW faults.
• Disarmed BMC POST Watchdog Timeout in secondary nodes.
• Make write once registers in south bridge read only.
• Hide non-existing devices behind some PCI-X bridges.
• Fixed resource allocation in a PCI-to-PCI bridge with an internal request under another PCI-to-PCI bridge.
• Fixed NULL Chassis Number in Error Messages from POST.
• Fixed DHCP Control line item in RSA II Settings menu.

Enhancements:

• Expand PCIe ECRC Control to also override checking.
• Described proximity domains for I/O bus hierarchies.
• Updated SMBIOS Structures from 2.4 to 2.5 version.
• Updated BCOM PXE ROM to v10.7.5 for onboard Ethernet.
• Allowed add-on video adapters to run in non-vga mode.
• Added multi-node support to lflash/wflash utilities.
• Supported for Windows Server 2008 in wflash utility.
• Reported planar ethernet MAC addresses during boot.
• Added Int 13h Extensions to support booting WinPE 2.0 from USB flash drive.

Limitations: none.
Dependencies: none.

Version 1.11, Build ID: ZUE165C

Problem(s) fixed:

• Fix single memory card configuration with mixed DIMM technologies.

Enhancements: none.
Limitations: none.
Dependencies: none.

Version 1.11, Build ID: ZUE165B
Problem(s) fixed:

• Fix to prevent Windows from detecting new hardware, during scan for hardware changes after BIOS update.

Enhancements: none.
Limitations: none.
Dependencies: none.

Version 1.11, Build ID: ZUE165A

Problem(s) fixed:

• Fix slow hard disk access, while in Legacy USB mode.
• Fix booting from USB devices in some configurations by aligning memory allocated for Legacy USB to 64KB.
• Fix duplicate resource allocation to peer PCI-to-PCI bridges under another PCI-to-PCI bridge.
• Run unsupported PCI-X Mode 2 Adapters in Mode 1.
• Fix the Package Version in lflash/wflash utilities.
• Reset the system upon detecting a CPU shutdown, instead of just letting the system hang. Typically, CPU shutdown is caused by the tripple faults in SW.
• Fix to let POST/BIOS boot the system without CPU #1, as it could be disabled due to an error in the CPU.
• Fix to prevent automatic power on of the system, after the first attempt to power off the system, when booted to an operating system without ACPI, using the wake on LAN.
• Fix to prevent hang during Int 19h in the presence of a bootable CD media.
• Fix BIOS version string in SMBIOS Type 0 Structure.
• Fix to prevent intermittent hang, while running some CPU Diagnostics, when run with USB keyboard & mouse.
• Enable detection of collision between memory access for background scrub & remote cache, if collisions can't be avoided & remote cache memory is scrubbed.
• Don't return Target Abort on DMA Reads experiencing a RIO Reply Timeout to prevent problems seen with some adapters.
• Don't turn on Information LED on Front Panel, unless messages from BIOS/POST requires user intervention.
• Don't turn on Fault LED on Front Panel upon a memory error, unless no spare symbols are available to fix.

Enhancements:

• Display user prompt to Press Fx keys for 10 seconds.
• Update BCOM PXE ROM to v10.0.9 for onboard ethernet.
• Press F12 to Select Boot Device or for Network Boot. Previously, F12 was used to only Select Boot Device. Now, if the user presses F12, the system will still enter the Select Boot Device menu at the end of the POST. However, if the user does not enter the above menu in 30 seconds or does not select a Boot Device, the system will now Boot from the Network instead of following the Regular Boot Sequence.
• Reserve the Extended PCI Configuration Space using, the INT 15h, AX=E820h.
  • Query System Address Map. Linux reports following messages, if not reserved: "PCI: BIOS Bug: MCFG area is not E820-reserved." "PCI: Not using MMCONFIG."
• Add CMOSDEF.BIN to the flash for the defless ASU.
• BMC resources are exposed to the OS through ACPI, for automatic discovery & loading of device drivers. Exposing resources via ACPI makes BMC Plug and Play.
• Exclude I/O addresses 0xCF8-0xCFF (8 bytes) from Compatibility Bus resources, to avoid sharing with the PCI Configuration Space access mechanism.
• Update SMBIOS Structures from 2.3 to 2.4 version. Also, capture CPLD, BMC & RSA versions using SMBIOS.
• Initialize MSI/MSI-X Capability List in PCI Devices, to support MSI aware Device Drivers on MSI unaware Operating Systems.
• Add Extended PCI Configuration Space Access using BIOS Int 1Ah Functions & BIOS32 Service Directory.
• Support Extended BIOS Data Area upto and including 64KB instead of 64KB-1 to allow legacy software to expand it upto an entire segment.
• Support for PCI Firmware 3.0 compliant Option ROMs. Option ROM is first scanned for PCI Firmware 3.0 compliant image. Also, PCI Firmware 3.0 compliant image is run from a scratch memory, if necessary.
• Improve efficiency of RIO-Over-Infiniband by better coalescing RIO End-to-End Acknowledgement packets.
• Reduce Memory Latency by one clock for configuration with Homogeneous DIMM Technologies in RBS or FAMM Memory Array Settings.
• Add setup option to enable (default) or disable Memory Remap Above 64GB, while reclaiming memory, as OS may not support addressability beyond 64GB.
• Add setup option to enable or disable (default) High Precision Event Timers (HPET) to replace/supplement 8254/RTC Legacy Timers.
• Added support to display X3 chipset version during POST/BIOS initialization. The X3 chipset version can also be viewed via the F1 POST/BIOS Setup Utility under the Product Data submenu located under the main menu of the F1 POST/BIOS Setup Utility.

Version 1.10, Build ID: ZUE156A

Enhancements:

• Added support for Intel CPU type F68.
• Added in feature to view the firmware levels of the planar Complex Programmable Logic Devices (CPLD) via the F1 POST/BIOS Setup Utility. The CPLD firmware levels are visible under the Product Data submenu located under the main menu of the F1 POST/BIOS Setup Utility.
• Added in ability to configure the hostname for the Baseboard Management Controller (BMC) if the BMC has IPMI 2.0 support (Z2BTXXA firmware level). New menu option is available for this feature by going into the F1 POST/BIOS Setup Utility and selecting Advanced Settings / Baseboard Management Controller (BMC) Settings / BMC Network Configuration. Note: changing and/or modification of the BMC hostname will require a reboot of the BMC for this setting to take effect.
• Added support in for 2.3 version of the X3 PCI host bridge chipset. Feature now provided in the F1 POST/BIOS Setup Utility to auto-configure the PCI mode/speed of PCI adapters installed based on the type of X3 PCI host bridge chipset installed on the system.
• Added in capability through the DOS based flash update utility to now update the Diagnostics across all merged systems in a partition. The previous utility would only allow the primary node Diagnostic image to be updated during the utility. Note that the user will be prompted, just as with the BIOS update, to automatically update each node to the updated Diagnostic firmware.
  

Version 1.09, Build ID: ZUE154A

Problem(s) fixed:

• Fix to prevent a node from failing to attempt to merge if the UUID of the node starts with a leading byte of '0x00'.
• Fix to prevent a system hang when opening the hot plug PCI latch when a PCIX 2.0 adapter is installed.

Enhancements:

• Added support for the 3.0 revision of the X3 memory controller chipset.
• Added in feature to enable the local video display very early during POST execution.
• Added support for Intel CPU type F66.
• Added in IPMI 2.0 POST/BIOS support for Baseboard Management Controller (provide the user with the ability via the F1 POST/BIOS Setup Utility to configure the BMC for DHCP operation).
• Added in ability in the F1 POST/BIOS Setup Utility to disable individual PCI slots ROM execution. New menu option is available only when a Remote Supervisor II Adapter is not installed and is located in Advanced Settings / Advanced PCI Settings / PCI ROM Execution Control.
• Added in ability in the F1 POST/BIOS Setup Utility to disable PCIX Mode 2 266MHz mode in adapters which are capable of supporting that mode of operation.
• Added in ability in the F1 POST/BIOS Setup Utility to enable/disable Virtualization Technology (VT) in processors which support this feature. This feature will only be visible and/or selectable if all CPUs installed in the system support VT and/or VT will be enabled by default.

Dependencies:

• Diagnostics version 1.05 is required with BIOS 1.09 version or higher. Using BIOS 1.09 or higher in combination with diagnostics 1.04 or lower will result in a system hang/machine check when running the ECC test in diagnostics.
• BMC version 2.00 or higher is required with BIOS 1.09 version or higher if the user wishes to utilize the DHCP configuration option support added in the Setup/Configuration Utility.
• Version 1.09 of POST/BIOS will disable the hot plug interrupt signal from the memory card(s) if the system has not been configured for "Full Array Memory Mirroring" mode (FAMM) or "Hot Add Memory Mode" (HAMM) in the Memory Array menu under Advanced Settings/Memory Settings in the Setup/Configuration Utility. In some cases, the memory board hot plug sensor may generate multiple interrupts which can result in POST CP B1 hangs, Operating System hangs, or cluster failovers regardless of the memory array setting. If FAMM or HAMM is enabled, one bank of the mirrored memory may power off/go offline if one or more memory sensors are defective. System users can also run diagnostics on the memory card latch by going into the F2 Diagnostic Utility, select "Basic", and then select the "Active Memory Latch Test". This change requires CPLD version 1.05 or greater to be installed as well to disable this interrupt.

Version 1.08, Build ID: ZUE147A

Problem(s) fixed:

• Fixed system POST/BIOS hang at CP DD when the primary node is attempting to merge with secondary node(s). This failure will only occur when the secondary node(s) have their planar SAS controller disabled in the Setup/Configuration Utility and all PCI slots on that node are populated with adapters which require regular Memory Mapped I/O resources and do not require Prefetchable Memory Mapped I/O resources.
• Modified flash update utilities (DOS, lflash, wflash) to prevent auto-generation of a UUID which contains a leading byte of zero. A UUID which contains a leading byte of zero can prevent a system from trying to merge with other nodes in a multi-chassis configuration.

Enhancements:

• Added in ability to now show the BMC build ID and build date along with the current version in the Setup/Configuration Utility. The new information can be seen by selecting Advanced Settings/Baseboard Management Controller (BMC) Settings.
• Updated video bios to no longer show message string "IBM RSA II powered by ATI."

Version 1.07, Build ID: ZUE145A

Problem(s) fixed:

• Fix to properly route PIC mode interrupts for PCI slots for devices which utilize their Int B, Int C or Int D pins.
• Fix to allow system boot from IBM 512MB and 1GB USB keys.
• Fix to prevent one or more nodes in a 4/8 node configuration from booting as a standalone node if the system has recovered from an AC power loss or has been powered on with the power button within 2 minutes of applying AC power.
• Fix to allow system to power off and/or reset if either all memory has been removed from the system or all memory has been disabled due to errors.
• Fix to allow the RSA II adapter to properly illuminate the Blue LED after an AC power cycle.
• Fix to prevent ServeRaid 8i Kernel Panic during POST/BIOS execution when the Adaptec SAS controller has been disabled in the Setup/Configuration Utility.
• Fix to no longer display "Planar PCI device not responding or disabled by user" message when the user has selected to disable the planar ethernet and/or SAS controller in the Setup/Configuration Utility. This change will also prevent the front panel log LED from illumunating.
• Fix for the BIOS/Diagnostics Flash Update Utility (flash2.exe) to not prompt the user for flash confirmation if unattended mode has been selected and multiple nodes have been detected.

Enhancements:

• Added in support for Dual-Core Intel Xeon MP processors.
• The default setting for the "Processor Hardware Prefetcher" feature is changed to "Disabled" as recommended by Intel for most servers. This setting will become "Disabled" if the user loads the default settings for all configuration settings or just the single line item setting.
  

Version 1.06, Build ID: ZUE140A

Enhancements:

• Added support for Intel CPU type F49.

Version 1.05, Build ID: ZUE139A

Enhancements:

• Initial support for the IBM xSeries x260.
• Added support for IBM xSeries x460 4 and 8 node configurations.

Version 1.04, Build ID: ZUE136A

Enhancements:

• Added support for 4GB DIMMs (IBM xSeries x366 only).

Dependencies:

• BIOS version 1.04 (ZUJT36A) and higher is required when using RSA II firmware version 1.03 (ZUEP25A) and higher. Using a BIOS version of 1.03 or lower and/or in combination of RSA II version 1.03 or higher will result in a loss of RSA II related menus/information items and PCI Slot/Device information in the F1 POST/BIOS Setup Utility and/or a loss of communication between POST/BIOS and the RSA II.

Version 1.03, Build ID: ZUE130A

Enhancements:

• Initial support for the IBM xSeries x460.

Dependencies:

• BMC firmware version 1.5 (ZUBT22A) or higher is REQUIRED to be used with BIOS version 1.03 (ZUJT30A) and higher. Using a BMC version of 1.4 or lower and/or in combination of BIOS 1.03 or higher will result in a loss of RSA II related menus/information items and PCI Slot/Device information in the F1 POST/BIOS Setup Utility and/or a loss of communication between POST/BIOS and the RSA II.

Version 1.02, Build ID: ZUE126A

Problem(s) fixed:

• Fix to prevent system from generating a NMI if a PCIX Correctable Threshold has been reached. The system will now properly generate a PFA alert if this condition occurs.
• Fix to allow the Automatic BIOS Recovery feature to properly recover from a catastrophic POST/BIOS flash update failure.
• Fix to modify the POST/BIOS USB CHS translation to be compatible with that used by most laptops. This will require specific USB keys which were bootable before on the x366/x460/x260 to be re-created.
• Fix to properly send the BMC the correct system time during POST/BIOS operation between the hours of 19:00:00 and 00:00:00.
• Fix to prevent a possible system hang when booting from a locally attached USB floppy device.

Enhancements:

• Changed default setting for "RSA II Disable Periodic SMI Generation" to Enabled to prevent from RSA II from generating a 15 minute SMI. This periodic SMI is not currently used on the x366/x460 and should be defaulted to disabled.
• Change to increase performance when running Windows Server 2003 and using the performance monitor application. This fix will also resolve a timer skew issue when running SAP.

Version 1.01, Build ID: ZUE123A

Problem(s) fixed:

• Fix required to prevent system hang during Broadcom PXE ROM execution when Serial Over Lan session is active with the BMC.
• Fix required to prevent intermittent "1602 System Management Adapter Communication" error when the RSA II adatper is installed and AC power has been applied.
• Fix required to allow the RSA II "Vital Product Data" section of the web interface to properly show the system serial number and machine type.
• Fix to prevent POST/BIOS from intermittently reporting and disabling memory DIMMs during memory configuration during repeated warm boot or AC cycles.

Version 1.00, Build ID: ZUE121A

• Initial release