Symptoms corrected by the latest BIOS update - Netfinity 8500R

Resolving The Problem

Symptoms corrected by version 1.07

• Fixed the hang problem when NIC (Network Interface Card) failed to boot from a server
• Changed the text where a utility displays max speed of the processor (that is, from 800Mhz to 900Mhz)

Symptoms corrected by version 1.06

• Running serial port under Windows 2000 in non-ACPI mode caused system to hang
• Incorporated updated diagnostic code which increased the allocation range of the RAMDrive
• Fixed NMI problem which is generated when Control-A is pressed to access Adaptec SCSI utility when a Harp adapter is plugged into PCI slot #6 or #7
• Corrected Windows 2000 "Local APIC NMI" structure to reflect the actual number of processor(s) installed in the system

New features

• Added microcode for Cascade B0 stepping level
• Changed format of the product name to adhere to SMBIOS version 2.3 specifications
• Changed the year of copyright from 2000 to 2001

Symptoms corrected by version 1.05

• Added reseting of the system after detecting double bit ECC memory error
• Added a code to display error message if mismatch memory DIMM pair(s) installed in the system

Symptoms corrected by version 1.04

• Added Cascade A1 stepping microcode
• Changed text to display installed memory size vs system memory size during POST and in SETUP
• Added code to support memory DIMMs with CAS latency 2 for better performance
• Added code to support the Intel Pentium Xeon III processor of speed up to 700 MHz
• Cleaned up redundant PCI codes
• Added support for memory ranges from 16GB to 32GB

Note: Refer to the Readme file for a summary of fixes to the code.

Symptoms corrected by version 1.03

• Support was added for DIMMS of 256 Mbit memory technology.
• The time delay was reduced (from 3 seconds to 1.5 seconds) for powering up PCI adapters during POST in order to speed up the boot time.
• Support was added for special NMI break-in card (for service use only). Now NMI can be generated by forced SERR. This enhancement requires POST GA version of glue logic code.
• The flash update utility was modified to support command line interface for backing up the current BIOS image or diagnostic images onto diskette(s).
• Code was added to disable the Power Management Enable (PME) bit for PCI adapters during POST. This is one of the requirements for Hardware Compatibility Test (Version 9.5 or above) for Windows 2000.
• A Microsoft Windows NT 4.0 hang condition when a single bit memory error occurs in the first memory DIMM was fixed.

Symptoms corrected by version 1.02

• Fixed PCI adaptors recognition and configuration problem in an expansion unit with multiple PCI-PCI bridges
• Fixed hibernation problem for Windows 2000 by changing the memory mapped I/O and I/O ranges for each PCI bus to a constant range
• Fixed active PCI support for Windows 2000 by updating the latest level of ACPI code
• Changed the year of copyright from 1999 to 2000

Symptoms corrected by version 1.01

• Added support for following adapters:
  • Arctic A186 MP2
  • Adaptec Ethernet with Dual Ports
  • Adaptec Ethernet with Quad Ports
  • PILA 8472 EtherExpress Pro 100+ Dual Ports
• Added support for special NMI break-in card (for service use only).
• Added support for failure detection for 1st bank of DIMMs.
• Changed the designation of the integrated SCSI device (channel A & B) from slot 13 to a non expansion o slot device.

Note: Because of the above change, when a system BIOS is updated from Revision 0 to Revision 1, the following messages will appear during the first boot ONLY, and they will also be logged in the system error log.

PCI device(s) removed since last power up:
PCI Vendor ID=9005 PCI Device ID=005F previously in slot 13
PCI Vendor ID=9005 PCI Device ID=005F previously in slot 13

Hence, please ignore the above three information messages. These 3 messages will only occur when the system is rebooted the first time after it is updated from BIOS Revision 0 to BIOS Revision 1. It will not occur during the subsequent boots.

• To ensure the completion of PCI adapter's power up sequence, increased the time delay between back-to-back power up commands to the hotplug controller during POST
• Corrected the image checksum generation for "remote" flash update )if requested) during POST
• Removed IRQ 9 from the manual selection list for PCI devices in SETUP, because IRQ 9 has been dedicated for System Control Interrupt (SCI) which is required to support ACPI
• Fixed a problem for DC power cycling test by ensuring that the I2C bus is available for subsequent power on and power off commands by a test program through Service Processor
• Fixed intermittent I2C protocol contention problem during memory initialization
• Fixed "CP:CC POST hang" problem, when the system is rebooted after an ECC memory "check bit" error occurred on the "1st bank" of DIMMs
• Added a feature to log the bad CPU status in the CMOS when it is detected by SMI handler