IBM Support

PH70702: INLINE ASSEMBLY LITERAL REFERENCE IGNORING CLOBBER LIST FOR BASE REGISTER

A fix is available

Subscribe

You can track all active APARs for this component.

 

APAR status

  • Closed as program error.

Error description

  • Literals used in inline assembly are preferentially using
    Register 1 as the default base register for addressing -- even
    if Register 1 is in the inline assembly clobber list (i.e.
    declaring R1 will be destroyed).  The presumption is that if R1
    is in the clobber list, it isn't safe to enter the inline ASM
    using R1 for literal addressing, because it may get destroyed
    before the literal is referenced in the HLASM.
    
    === TEST CASE ===
    int main() {
                   int input=999;
             __asm__(
       " LR 1,%[input] \n"
       " L  15,=AL1(X'FF') \n"
       :
       : [input]"r"(input)
       : "r0", "r1", "r14", "r15"
     );
    }
    
    $ ibm-clang -m64 -O0 -g  -mzos-listing=json apar.c
    $ ibm-clang-listing-formatter a-apar.json
    ...           > Inline Assembly --- Begin
                              *  LR 1,2
                              *  L  15,=AL1(X'FF')
                              L#tmp5:
    00000024  C010 0000 0000      LARL     1,L#func0asm_literals0
    0000002A  1812 58F0 1000
              > Inline Assembly --- End
    ...
    
    
    The generated listing file shows a compiler-generated LARL
    referencing the address of the =AL1(X'FF') literal into R1 -
    despite R1 being in the clobber list and being overwritten by
    the LR 1,2 instruction.
    

Local fix

Problem summary

  • ****************************************************************
    * USERS AFFECTED: User who use macros in inline asm            *
    *                 statements which generate literal data       *
    ****************************************************************
    * PROBLEM DESCRIPTION: The base register used for literal      *
    *                      data is a register in the clobber list  *
    *                      of the asm statement, which means that  *
    *                      the register may be clobbered before    *
    *                      it is used to address literal data.     *
    ****************************************************************
    * RECOMMENDATION: Install the PTF                              *
    ****************************************************************
    N/A
    

Problem conclusion

  • Install the PTF
    

Temporary fix

Comments

APAR Information

  • APAR number

    PH70702

  • Reported component name

    C/C++ FOR MVS

  • Reported component ID

    56551210A

  • Reported release

    7C4

  • Status

    CLOSED PER

  • PE

    NoPE

  • HIPER

    NoHIPER

  • Special Attention

    NoSpecatt / Xsystem

  • Submitted date

    2026-03-27

  • Closed date

    2026-06-29

  • Last modified date

    2026-07-02

  • APAR is sysrouted FROM one or more of the following:

  • APAR is sysrouted TO one or more of the following:

Modules/Macros

  • CNWC001  CNWC002  CNWC003  CNWC004  CNWC005  CNWC006  CNWC007
    CNWC008  CNWC009  CNWC00A  CNWC00B  CNWC00C  CNWC00D  CNWC00E
    CNWC00F  CNWC010  CNWC011  CNWC012  CNWC013  CNWC014  CNWC015
    CNWC016  CNWC017  CNWC018  CNWC019  CNWC01A  CNWC01B  CNWC01C
    CNWC01D  CNWC01E  CNWC01F  CNWC020  CNWC021  CNWC022  CNWC023
    CNWC024  CNWC025  CNWC026  CNWCH006 CNWCH00A CNWCH00B CNWLDMD
    CNWOX220 CNWPH0B3 CNWPH107 CNWPH146 CNWPH20D CNWPH2E3 CNWPH31E
    CNWPH334 CNWPH446 CNWPH55F CNWPH673 CNWPHPAX CNWRN$P0 CNWRN$PX
    CNWRNH00 CNWRNH01 CNWRNH02 CNWRNH03 CNWRNH04 CNWRNH05 CNWRNH06
    CNWRNH07 CNWRNH08 CNWRNH09 CNWRNH0A CNWRNH0B CNWRNH0C CNWRNH0D
    CNWRNH0E CNWRNH0F CNWRNH10 CNWRNH11 CNWRNH12 CNWRNH13 CNWRNH14
    CNWRNH15 CNWRNH16 CNWRNH17 CNWRNH18 CNWRNH19 CNWRNH1A CNWRNH1B
    CNWRNH1C CNWRNH1D CNWRNH1E CNWRNH1F CNWRNH20 CNWRNH21 CNWRNH22
    CNWRNH23 CNWRNH24 CNWRNH25 CNWRNH26 CNWRNH27 CNWRNH28 CNWRNH29
    CNWRNH2A CNWRNH2B CNWRNH2C CNWRNH2D CNWRNH2E CNWRNH2F CNWRNH30
    CNWRNH31 CNWRNH32 CNWRNH33 CNWRNH34 CNWRNH35 CNWRNH36 CNWRNH37
    CNWRNH38 CNWRNH39 CNWRNH3A CNWRNH3B CNWRNH3C CNWRNH3D CNWRNH3E
    CNWRNH3F CNWRNH40 CNWRNH41 CNWRNH42 CNWRNH43 CNWRNH44 CNWRNH45
    CNWRNH46 CNWRNH47 CNWRNH48 CNWRNH49 CNWRNH4A CNWRNH4B CNWRNH4C
    CNWRNH4D CNWRNH4E CNWRNH4F CNWRNH50 CNWRNH51 CNWRNH52 CNWRNH53
    CNWRNH54 CNWRNH55 CNWRNH56 CNWRNH57 CNWRNH58 CNWRNH59 CNWRNH5A
    CNWRNH5B CNWRNH5C CNWRNH5D CNWRNH5E CNWRNH5F CNWRNH60 CNWRNH61
    CNWRNH62 CNWRNH63 CNWRNH64 CNWRNH65 CNWRNH66 CNWRNH67 CNWRNH68
    CNWRNH69 CNWRNH6A CNWRNH6B CNWRNH6C CNWRNH6D CNWRNH6E CNWRNH6F
    CNWRNH70 CNWRNH71 CNWRNH72 CNWRNH73 CNWRNH74 CNWRNH75 CNWRNH76
    CNWRNH77 CNWRNH78 CNWRNH79 CNWRNH7A CNWRNH7B CNWRNH7C CNWRNH7D
    CNWRNH7E CNWRNH7F CNWRNH80 CNWRNH81 CNWRNH82 CNWRNH83 CNWRNH84
    CNWRNH85 CNWRNH86 CNWRNH87 CNWRNH88 CNWRNH89 CNWRNH8A CNWRNH8B
    CNWRNH8C CNWRNH8D CNWRNH8E CNWRNH8F CNWRNH90 CNWRNH91 CNWRNH92
    CNWRNH93 CNWRNH94 CNWRNH95 CNWRNH96 CNWRNH99 CNWRNH9A CNWRNH9B
    CNWRNH9C CNWRNH9D CNWRNH9E CNWRNH9F CNWRNHA0 CNWRNHA1 CNWRNHA2
    CNWRNHA3 CNWRNHA4 CNWRNHA5 CNWRNHA6 CNWRNHA7 CNWRNHA8 CNWRNHA9
    CNWRNHAB CNWRNHAC CNWRNHAD CNWRNHAE CNWRNHAF CNWRNHB0 CNWRNHB1
    CNWRNHB2 CNWRNHB3 CNWRNHB4 CNWRNHB5 CNWRNHB6 CNWRNHB7 CNWRNN00
    CNWRNN01 CNWRNN02 CNWRNN03 CNWRNN04 CNWRNN05 CNWRNN06 CNWRNN07
    

Fix information

  • Fixed component name

    C/C++ FOR MVS

  • Fixed component ID

    56551210A

Applicable component levels

  • R7C4 PSY UO07991

       UP26/07/02 P F606

Fix is available

  • Select the PTF appropriate for your component level. You will be required to sign in. Distribution on physical media is not available in all countries.

[{"Business Unit":{"code":"BU054","label":"Systems w\/TPS"},"Product":{"code":"SSTLTF","label":"z\/OS XL C\/C++"},"Platform":[{"code":"PF025","label":"Platform Independent"}],"Version":"7C4","Line of Business":{"code":"LOB08","label":"Cognitive Systems"}}]

Document Information

Modified date:
02 July 2026