PH61537: DFHIS0002 A SEVERE ERROR (CODE X'0812') HAS OCCURRED IN MODULE DFHISAL

Obtain the fix for this APAR.

APAR status

• Closed as program error.

Error description

• In a CICS with IPIC to CTG connections you receive message
  +DFHIS0002 A severe error (code X'0812') has occurred in module
  DFHISAL.
  After the message occurred  there is an increase in the
  Transaction Response Time.
  
  The issue here is that two tasks are interleaving whilst one is
  attempting to FREE the ISSB (task xxxxx) and the other is
  attempting to queue an ALLOCATE against it (task yyyyy) . This
  has come to light because at the time of the error there is a
  lot of contention for the SMLOCK, both these tasks end up losing
  control of the QR TCB whilst SUSPENDING on this lock. This
  causes the tasks to interleave in a way that leaves the ISSB in
  the FREE state and on the FREE chain, but also queued for
  allocate and passed to a task. The task that receives the FREE
  ISSB does not notice that the ISSB is in this state until it
  comes to free it at end of task. That attempt to free the ISSB
  fails as the ISSB is in the incorrect state (already FREE)
  

Local fix

Problem summary

• ****************************************************************
  * USERS AFFECTED: All CICS Users.                              *
  ****************************************************************
  * PROBLEM DESCRIPTION: Message DFHIS0002 and severe error,     *
  *                      code x'0812' in module DFHISAL.         *
  ****************************************************************
  It is possible to get this error when one transaction is in the
  process of terminating and in so doing freeing an ISSB.
  Another transaction is being started and requires an ISSB, a
  check in CICS code see that the ISSB is about to be freed and
  obtains a storage buffer (ISQA) to hold information about this
  ISSB to queue it for later use.
  The first transaction finally frees the ISSB and marks it free
  and checks to see if another transaction has the ISSB queued for
  allocate, but because of a small timing window the fact that the
  second transaction has it queued has not yet happened.
  The second transaction is now using an ISSB that is marked free
  and when it completes and finds the ISSB in an invalid state,
  already free, and so raises the severe error.
  

Problem conclusion

• DFHISAL has been changed to check for the ISSB being in a free
  state after obtaining the ISQA buffer.
  

Temporary fix

Comments

APAR Information

• APAR is sysrouted FROM one or more of the following:

  PH59694

• APAR is sysrouted TO one or more of the following:

  UI97660 UI97661

Modules/Macros

• DFHISAL
  

Fix information

• Fixed component name

  CICS TS Z/OS V6

• Fixed component ID

  5655YA100

Applicable component levels

• R400 PSY UI97661

     UP24/07/18 P F407

• R500 PSY UI97660

     UP24/07/27 P F407

Fix is available

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