PI62330: ABEND0C2 IN IMS DEPENDENT REGION ISSUING A SPKA TO KEY 8 IN PROBLEM STATE BECAUSE THE KEY 8 BIT IN PKM HAS BEEN SET TO 0.

Obtain the fix for this APAR.

APAR status

• Closed as program error.

Error description

• ABEND0C2 in an IMS dependent region issuing a SPKA to key 8 in
  problem state because the key 8 bit in the hardware PKM has been
  set to zero.  This can occur when a SLIP is set with an IMS
  region (control, DLI, or dependent) in the ASID= list,
  or a PER SLIP is set with MODE=HOME and an IMS region is
  included in the address spaces being monitored (whether
  implicitly or explicitly). This error occurs
  if the SLIP command is issued when an IMS dependent region
  happens to be ISWITCHed in cross-memory mode to either CTL or
  DLI.  SLIP sets the space switch event bit in the ASTE for the
  address space, which causes an error path to be driven in the
  IMS dispatcher on a subsequent ISWITCH back out of cross memory
  mode. The error path exits XM mode using an alternate technique,
  and the combination of a "normal" switch to cross-memory and an
  error-path switch from cross-memory results in the PKM bit for
  key 8 getting reset.  This causes no symptoms unless a following
  code path is executed that issues an SPKA to key 8 in problem
  state.  Using SCI from within a dependent region address space
  is one such path.
  

Local fix

Problem summary

• ****************************************************************
  * USERS AFFECTED: All users of IMS V13.                        *
  ****************************************************************
  * PROBLEM DESCRIPTION: ABEND0C2 in module CSLSSBM0 because     *
  *                      the key 8 bit in the hardware PSW-Key   *
  *                      Mask (PKM) was unintentionally reset    *
  *                      to zero by the IMS dispatcher for an    *
  *                      IMS dependent region.  Certain SLIP     *
  *                      traps can trigger this situation.       *
  ****************************************************************
  * RECOMMENDATION: INSTALL CORRECTIVE SERVICE FOR APAR/PTF      *
  ****************************************************************
  The IMS dispatcher uses the LASP instruction to set a particular
  cross-memory state as the result of an ISWITCH macro call.
  LASP's processing includes setting the primary and secondary
  address spaces to the ISWITCH target address spaces.  However,
  LASP's processing also updates the PSW-key mask (PKM) in CR3
  based on the input values passed to it.
  
  If the LASP instruction returns CC=3, then the dispatcher
  reverts to using an older technique to effect the cross-memory
  state setting, via PC and PT (or PTI) instructions.  LASP gets
  CC=3 if the space-switch-event-control bit is set -- either in
  control register 1 or in the target primary Address-Space-
  Control-Entry (ASCE).
  
  The space-switch-event-control bit will be set when certain SLIP
  traps are enabled.  Specifically, when a PER SLIP is set and:
  
   - An IMS address space (control, DLI, or dependent) is included
     in the ASID= list, -OR-
  
   - If MODE=HOME is specified and an IMS address space (control,
     DLI, or dependent) is included in the set of address spaces
     being monitored
  
  then the space-switch-event-control bit will be set, LASP will
  return CC=3 for IMS cross-memory changes, and the IMS dispatcher
  will fall back and use the PC and PT/PTI technique instead.
  
  When the IMS dispatcher uses LASP to switch to an IMS control
  address space (CTL or DLI), it uses the CR3/4 values that the
  target address space was initially dispatched with.  The PKM for
  these address spaces is X'0140' (key 7 and key 9 enabled).  When
  the IMS dispatcher uses LASP to switch back to a dependent
  region, the CR3/4 values are typically the values that the
  dependent region had when it identified to IMS.  The PKM value
  is X'00C0' (key 8 and key 9 enabled).  CR3/4 can also be
  restored from the ISWITCH stack (i.e., to what they were when
  ISWITCH TO=XMCTL or XMDLI was entered); however, the PKM value
  must always match the value at identify for proper dispatcher
  operation.
  
  When the IMS dispatcher uses a PC instruction to switch to an
  IMS control address space (CTL or DLI), it does not change the
  PKM from what it was on entry.  For a dependent region, the PKM
  will be X'00C0' (key 8 and key 9 enabled).  When the IMS
  dispatcher uses a PT (or PTI) instruction to switch back to a
  dependent region, it uses the region's home PKM (X'00C0') as
  input to the PT/PTI instruction.  This value is ANDed with the
  current PKM.  For a "return home" from a prior PC XM switch,
  this has the effect of leaving the PKM unchanged (X'00C0').
  
  The reported problem occurs when a SLIP that sets the space-
  switch-event-control bit is issued and there is an IMS dependent
  region processing in IMS that had previously used LASP to switch
  to cross-memory control (XMCTL) or cross-memory DLI (XMDLI).
  If the dependent region ITASK exits cross-memory mode after the
  SLIP is issued, the LASP to set non-XM mode will fail with CC=3.
  The dispatcher will then use a PT or PTI to exit cross memory
  mode.  The following occurs:
  
    - LASP previously set the PKM to X'0140' (keys 7 and 9)
  
    - PT ANDs this value with the dependent region PKM, X'00C0'
      (keys 8 and 9)
  
  The resultant PKM is X'0040' (key 9 only), and the key 8 PKM
  bit value is lost.
  
  This does not itself create an immediate problem.  However, if
  later dependent region code running in problem state issues an
  SPKA instruction to set the PSW to key 8, the SPKA X'80'
  instruction will abend with a S0C2 abend.  This occurs even if
  the issuer of SPKA is already in key 8.
  
  In the reported problem, the 0C2 abend occurred during an SCI
  buffer release call (CSLSCBFR) in module CSLSSBM0 when invoked
  by the key 8 application program that was running in the
  dependent region.
  

Problem conclusion

• GEN:
  KEYWORDS:
   IMSSERV
  
  *** END IMS KEYWORDS ***
  The IMS dispatcher cross-memory services module, DFSDSPX0, is
  changed to not set the PKM to the target address space's PKM
  for an XMCTL or XMDLI ISWITCH when using LASP.  Instead, the PKM
  will be left unchanged (so for a dependent region, it will be
  X'00C0').  This is consistent with the operation of the PC -
  PT/PTI fall back algorithm.  IMS does not need additional PKM
  bits set, since it executes in supervisor state.
  
  With this approach, if XMCTL or XMDLI cross memory mode is set
  via LASP for a dependent region, and then the subsequent return
  to the dependent region home address space uses PI/PTI, both the
  key 8 and key 9 bits will remain set.
  
  For diagnostics:  DFSDSPX0 now traces the new and old PKM values
  in the MEM CHANGE (X'11') dispatcher trace entry, word 6.  Word
  5 now contains the low 16 bits of the new PASTEIN (Primary ASN-
  Second-Table-Entry Instance Number) in the high half word, and
  the low 16 bits of the new SASTEIN (Secondary ASN-Second-Table-
  Entry Instance Number) in the low half word.  DFSDSPX0 now
  traces the old PKM value in the low half word of word 6 of the
  MEM CHANGE PC and PT entries (X'0E').
  
  Additionally: A count of the number of "failed" LASP calls
  (LASPs that returned CC=3) is already kept in the Dispatcher
  Global Control Area - a control block anchored off of SCDDGCA.
  However, this block is not currently formatted by the IMS dump
  formatter.  To improve serviceability, this APAR also adds dump
  formatting of this control block under the dispatcher dump
  formatter option:
  
  DFSADSP0 ASSEMBLE:
  
  Updated to access and format the DGCA.  Additionally, DFSADSP0
  was incorrectly setting the current block index code in field
  CAERMSGB; it has been changed to set the code in field CAERMSGF,
  where it should have been set.
  
  IABMSG MACRO:
  
  Updated to define a new block type string of "DGCA" (DGCAMSG)
  and index EQU (DGCAIX).
  
  DFSATRY0 ASSEMBLE:
  
  Reassembled to pick up the new IABMSG block type changes.
  
  DFSDGCA MACRO:
  
  Updated to fix a control block format model field definition
  error.
  
  Documentation Change:
  =====================
  
  The IMS Version 13 Diagnosis manual (GC19-3654) is updated as
  follows:
  
  In Chapter 18. SYS - System service aids, section "Dispatcher
  trace":
  
  Under TRACE ID = X 0E , Word 5 and Word 6 are be updated to
  read:
  
    word 5 - New Primary ASN-Second-Table-Entry Instance Number
             (PASTEIN), or 0 if none.
  
    word 6 - High half word = 0.  Low half word = old PKM.
  
  Under TRACE ID = X'11', Word 5 and Word 6 are be updated to
  read:
  
    word 5 - High half word = low 16 bits of new Primary ASN-
             Second-Table-Entry Instance Number (PASTEIN), or
             zero if none.  Low half word = low 16 bits of new
             Secondary ASN-Second-Table-Entry Instance Number
             (SASTEIN), or zero if none.
  
    word 6 - High half word = New PSW Key Mask (PKM).  Low half
             word = Old PKM.
  

Temporary fix

Comments

APAR Information

• APAR is sysrouted FROM one or more of the following:

• APAR is sysrouted TO one or more of the following:

  PI63739 UI39205

Modules/Macros

• DFSADSP0 DFSATRY0 DFSDGCA  DFSDSPX0 IABMSG
  IDSPWRK
  

Fix information

• Fixed component name

  IMS V13

• Fixed component ID

  5635A0400

Applicable component levels

• R300 PSY UI39205

     UP16/07/13 P F607

Fix is available

• Select the PTF appropriate for your component level. You will be required to sign in. Distribution on physical media is not available in all countries.