PK21153: THREE WAY DEADLOCK WHERE THE CALLER IS A HOLDER AND A SHARER OF A LOCK DOES NOT GET RESOLVED.

APAR status

• Closed as program error.

Error description

• In a large environment where more than nine(9) PSTs are involved
  in a multi-way deadlock and which has within it a three-way
  deadlock. If the caller is the holder of the lock and a sharer
  of the lock with two other PSTs. Then the code will not find and
  resolve the deadlock. There must be more than nine PSTs which
  causes extra code to be invoked to assist in lock detection and
  determination because of the large number and the other rarity
  of the caller being the holder and a sharer with two other PSTs.
  

Local fix

Problem summary

• ****************************************************************
  * USERS AFFECTED: All IMS R910 users with PI locking           *
  ****************************************************************
  * PROBLEM DESCRIPTION: 3-way deadlock in PI lock manager       *
  *                      with sharing resources and more than    *
  *                      9 PSTs involved.                        *
  ****************************************************************
  * RECOMMENDATION: INSTALL CORRECTIVE SERVICE FOR APAR/PTF      *
  ****************************************************************
  There are more than 9 PSTs involved in the deadlock circuit.
  
  PST1 owns resource A.
  
  PST2 owns resource B and shares resource C with PST3 and PST4.
  
  PST2 then waits for resource D shared by PST5, PST6, PST7 and
  PST8.
  
  PST6 waits for resource E owned by PST5.
  
  PST5 then waits for resource F owned by PST9.
  
  PST3 waits for resource K owned by PST9.
  
  PST7 waits for resource G owned by PST10.
  
  PST4 waits for resource H owned by PST10.
  
  PST9, PST10 then wait for resource A owned by PST1.
  
  PST8 shares resource D but it does not wait for any resource.
  
  There are other 6 PSTs waiting for resource B owned by PST2.
  
  When PST1(caller) waits for resource B owned by PST2, there are
  5 deadlock circuits.
  
  The following is a graphic version of the above description.
  
              6 PSTs wait
                      |
                      v
  ********        ********        ********
  |LOCK A|        |LOCK B|        |LOCK C|
  ********        ********        ********
  owned by        owned by        shared by
   PST1 _wait_>>   PST2 _share     PST4 _________wait___________>>
   ¬ ¬      \\               |       &                           |
   | |      //               >>--> PST2 __wait___>>              |
   | |      \\                       &            |              |
   | |      //                 <<_ PST3           |              v
   &#172; &#172;      \\                 |                  v              |
   | |     DEADLOCK!!          |wait             ********        |
   | |                         |                 |LOCK D|        |
   | |                         |                 ********        |
   | |     ********            |                 shared by       |
   | |     |LOCK K|  <<________v                  PST8           |
   | |     ********                                 &            |
   | |     owned by                               PST7--wait__>> |
   | <<wait_ PST9                                   &          v |
   &#172;          &#172;                                   PST6-wait>>  | |
   |          |own                                   &      v  | |
   |       ********           ********         <---PST5     |  | |
   |       |LOCK F|           |LOCK E|         |            |  | |
   |       ********           ********         |own         |  | |
   |       owned by           owned by <<______v            |  | |
   |         PST9   <<__wait__  PST5   <<____________wait___v  | |
   |                                                           | |
   |                                                           | |
   |                                                           | |
   &#172;       ********           ********                         | |
   |       |LOCK H|           |LOCK G|  <<________wait_________v |
   |       ********           ********                           |
   |       owned by           owned by                           |
   <<_wait_  PST10  <<__own___  PST10                            |
               &#172;                                                 |
               |                                                 |
               <<________________________________wait____________v
  
  
  
  
  PST9 is chosen as a victim. There are still 2 deadlock circuits
  unresolved.
  In this case the caller (PST1) should be the victim to resolve
  this deadlock.
  

Problem conclusion

• AIDS: RIDS/DBS RIDS/DBCALL DBS DBCALL
    DEP: NONE
    GEN:
  
  *** END IMS KEYWORDS ***
  The following change has been made to correct the reported
  problem:
  
  **************
  *  DFSFXC10  *
  **************
  One of the PSTs (say PST9) involved in a deadlock circuit
  is chosen as the victim and it's not the caller's PST.
  After the DLKCHK3 routine in module DFSFXC10 still decides
  PST9 is the victim, new routine CHKFORWD will search for
  the shared resource that PST is waiting for.
  PST1(caller) waits for resource B owned by PST2. PST2 owns
  resource B and shares resource C. There are 3 PSTs sharing
  resource C. There must be at least 2 PSTs sharing the same
  resource C and they must be waiting for other resources,
  say resource D. The resource D must have at least 1 owner
  waiting for next resource. In this condition, PST1 must be
  removed from the deadlock circuits to break the deadlock.
  

Temporary fix

• *********
  * HIPER *
  *********
  

Comments

• 'POSTREQ PK31846'
  
  REPINNED RP2006/11/10 (ATXT) TO ADD POSTREQ PK31846 INFO.
   PE2006/11/10 PTF IN ERROR. SEE APAR PK31846 FOR DESCRIPTION
  
  ×**** PE06/11/10 FIX IN ERROR. SEE APAR PK31846  FOR DESCRIPTION
  

APAR Information

• APAR is sysrouted FROM one or more of the following:

  PK17067

• APAR is sysrouted TO one or more of the following:

  UK13076

Modules/Macros

• DFSFXC10
  

Fix information

• Fixed component name

  IMS V9

• Fixed component ID

  5655J3800

Applicable component levels

• R901 PSY UK13076

     UP06/04/03 P F603 Ž