Product Documentation
Abstract
IBM System x3450 memory part numbers.
Content
- See ServerProven for memory compatibility
- See Configuration and Options Guide (COG) for all parts that are configurable with this system
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Description
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Marketing part number
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Replacement part number
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CRU/FRU Type
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|---|---|---|---|
| 2 GB kit (2x 1 GB) PC2-5300 CL5 ECC DDR2 Chipkill AMF DIMM 667 MHz | 39M5785 | 39M5784 = 1x 1 GB DIMM | |
| 2 GB kit PC2-5300 CL5 ECC DDR2 Chipkill AMF DIMM 667 MHz | 43X5026 | 39M5790 = 1x 2 GB DIMM | |
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4 GB kit (2x 2 GB) PC2-5300 CL5 ECC DDR2 Chipkill AMF DIMM 667 MHz
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39M5791
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39M5790 = 1x 2 GB DIMM
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8 GB kit (2x 4 GB) PC2-5300 CL5 ECC DDR2 Chipkill AMF DIMM 667 MHz
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39M5797
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41Y2845 = 1x 4 GB DIMM
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| 4 GB kit (2x 2 GB) 2RX8 1 Gigabit PC2-6400-666 DDR2-800 FBDIMM AMB+ |
46C7571 | 46C7568 = 1x 2 GB FBDIMM | |
| 8 GB kit (2x 4 GB) 4RX8 1 Gigabit PC2-6400-666 DDR2-800 FBDIMM AMB+ | 46C7572 | 46C7569 = 1x 4 GB FBDIMM |
Notes:
- 8 GB of high-speed, two-way interleaved, PC2-5300, 667 MHz ECC memory standard; maximum system memory 64 GB.
- The system will support a maximum of 64 GB using 4 GB DIMMS in all sixteen memory slots.
- AMF DDR2 ECC DIMMs, combined with an integrated ECC memory controller, correct many soft and hard single bit memory errors, and minimize disruption of service to LAN clients. DDR2 memory stands for double data rate, which means up to twice the data is transferred in the same clock cycle. Actual data transfer is at 667 MHz.
- ECC memory to detect double-bit errors and correct single-bit errors.
- Chipkill distributes information covered by error correction coding across separate memory chips so if any of the chips fail, the data can still be reconstructed from the remaining chips and the system can continue running.
- AMF Advanced memory protection features let you write to two branches of memory in real time for 100% redundancy.
- Increased processor performance coupled with DDR memory enables you to retrieve and process information faster and more efficiently. DDR memory executes twice the number of operations per cycle than traditional SDRAM memory, effectively doubling the data exchange rate between memory and processors.
- Memory mirroring requires an exact match between the DIMM types and sizes on both memory buses. Memory-mirroring effectively reduces available memory by half.
Document Location
Worldwide
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Document Information
Modified date:
24 January 2019
UID
ibm1MIGR-5074454