Troubleshooting
Problem
Checkpoint Code During POST, the computer displays the status of the components being tested in the form of Checkpoint (CP) codes in the lower left-hand corner of the screen.
Resolving The Problem
Checkpoint Code
During POST, the computer displays the status of the components being tested in the form of Checkpoint (CP) codes in the lower left-hand corner of the screen. The following is a list of the CP codes followed by the routine in process and the boot mode.
| CP Code 001 0D 12 03 05 B0 06 07 08 0A 0B 0C 0EC 10 11 B1 13 14 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 B2 23 24 24 25 26 B3 27 28 2A 2B 2F B4 30 31 32 33 34 35 36 37 B5 38 3B 3C 3F 40 41 42 43 44 45 46 47 48 4B 4C 4D 4E 4F B6 50 B7 B8 B9 51 52 53E 54 55 56 57 58 59 5A 5B BA 5C 5D 5E 62 70 63 BB 65 BC BD 66 BE 2C 49 2D 2E 68 BF 69 6A 6B 6C 6D 6E 6F 71 72 73 74 75 76 78 79 7A 7B 7C 7F |
Routine Its a Reset Intl Chip Perph Init Disable Video Phase 1 Enter Big Real Enable Local APIC Cache Init Init Refresh Wait for RTC Std CMOS Checksum Mid CMOS Checksum NS Ext CMOS Checksum NS SET_INIT Check Parity NonParity Disable Parity Init Seattle Test CPU Regs Init RTC Init Timer 0 Init Timer 2 Test DMA Test Page Regs Verify Refresh Enable Parity Save ID Test First 64K Clear First 64K POST with Stack Enable BIOSE00 BIOS Shadow Shadow SCSI Phase 2 POST Enable Bios F000 Shadow VPD Init Key Board Data Save ID Check P54C Init Q Boot Periph Config Init Timeout Pos_Setup Test DMA Locations Init DMA Regs Test PICs Init Vector Enable Timer Init Keyboard Clear Memory Size Error Check Configuration Mfg Boot Fork PCI Reset NVRAM check PCI Video Sign On Test Timer Tick Enable Video CSET BFR SIZMEM Size Memory Above 64K CSET AFT SIZ MEM Test Timer 2 Password Not Entered Test PS/2 Mouse Check For Mouse Buttons Init Key Board Flags Test Key Board Memory Test Prompt Test Memory Clear EBDA CSET AFT M TEST Allocate EBDA Set Planar Info xfer ebda vars Init P54M Init MP Structures CPU Speed Set Warm Boot Flag Clear Speed Bits Flob Enable System Interrupts C2 Security Check Init Key Board Test RTC Check For NPX reset hdctl FD INIT Set Floppy Config Unlock Early Init A20 Cache Config HD SETUP Verify CMOS Config Check For Setup Hot Key Clear Screen Init IRQ Levels IBM Cirrus DDC PACP Arbitration Enable Planar SCSI CSET BFR OPROM Do ROM Scan TCPC TCPC Errors Find Serial Ports Find Parallel Ports CSET AFT OPROM Get MC DATA PCI Configure MFG Hook 65 Init Time Of Day Check For Locked KeyBoard Init Enable NMI Set Boot Speed Set Key Board LEDs Init Flush Key Board Move Error Log To EBDA Init Disable Mouse Sys Reset Phase 2 Exit Big Real BOOT STRAP 1 SAD BOOT PROC Start Boot Sequence Read Boot Sector Boot Sector Read Complete Check for CE Boot Ride Xfer to boot code |
Boot Mode Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Restore+ Mfg Cold+Restore+ Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg+SAD Cold+Restore+ Mfg+SAD Cold+Restore+ Mfg Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Restore+ Mfg Cold+Warm+ Restore+Mfg+SAD SAD Cold+Restore+ Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg+SAD SAD Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg+SAD SAD Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Rstore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Restore+ Mfg Cold+Warm+ Restore+Mfg Cold+Restore+ Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Restore+ Mfg SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Restore Cold+Warm+ Restore+Mfg Cold+Restore Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore Cold+Warm+Mfg Cold+Restore+ Mfg Warm Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Restore+ Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg+SAD Warm Cold+Warm+Mfg+ SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Restore Cold+Warm+ Restore+SAD Cold+Warm+ Restore+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Restore Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg Cold+Warm Cold+Warm+ Restore+SAD Cold+Restore Cold Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg Cold+Warm+ Restore Cold+Warm+ Restore+Mfg Cold+Warm+ Restore Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg Cold+Warm+ Restore Cold+Warm+ Restore+Mfg MFG Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+SAD Cold+Warm+ Restore+Mfg+SAD Cold+Warm+ Restore+Mfg Cold+Warm+SAD Cold+Warm+ Restore+SAD Cold+Warm+ Restore+Mfg Cold+Warm+ Restore+Mfg+SAD MFG Cold+Warm+ Restore+Mfg+SAD Cold+Warm+Mfg+ SAD SAD N/A N/A N/A N/A N/A |
The following codes also produce a series of beeps. The series of beeps are listed for each code followed by an explanation of the code.
| CP CODE 82 83 84 85 86 87 88 89 90 91 92 93 95 99 9A 9B 9C 9D 9E 9F A0 A1 A3 A7 A8 D0 D1 D2 D3 D4 D5 D6 D7 E1H E5H |
Beeps 1-1-3 1-1-4 1-2-1 1-2-2 1-2-3 1-2-4 1-3-1 1-3-2 2-1-1 2-1-2 2-1-3 2-1-4 2-2-2 2-3-2 2-3-3 N/A N/A N/A N/A N/A 3-1-1 3-1-2 3-1-4 3-2-4 3-3-1 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A |
Definition CMOS write/read failure BIOS ROM check- sum failure Programmable Interval Timer test failure DMA initializ- ation failure DMA pageregis- ter write/read test failure RAM refresh verification failure 1st 64K RAM test failure 1st 64K RAM parity test failure Slave DMA regi- ster test in progress or failure Master DMA reg- ister test in- progrss or failure Master interupt mask register test failure Slave interrupt mask register test failure Key-board cont- roller test failure Screen memory test in-progr- ess or failure Screen retrace tests in-progr- ess or failure Search for video ROM in progress Screen believed operable -mode in low two bits Screen believed operable- mode in low two bits Screen believed operable- mode in two low bits Screen believed operable- mode in two low bits Timer tick in- terrupts test failure Interval timer channel 2 test failure Time-Of-Day clock test failure Comparing CMOS memory size against actual Memory size mismatch occu- rred Cache State Cache Init Cache Restore Cache Config Cache Flush Cache Enable Cache Disable Cache Custom CSET BFR VIDROM CSET AFT CMCFG |
Document Location
Worldwide
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Document Information
Modified date:
28 January 2019
UID
ibm1DDSE-455GWX