PK44970: ABENDU0780 RC05 WHEN ISSUING TCO COMMANDS FROM BATCH.

APAR status

• Closed as program error.

Error description

• ABENDU0780 RC05 when commands were being issued using TCO from
  a BMP. The Savearea flow for the failing PST is:
  DFSICIO0, GETASEGM, DOQMGRGU, DFSQRH00, DFSPREQ0, DFSQMGR0,
  DFSQGU00,  DFSQLOG0, DFSQLOG0-QLOG92B, DFSFLLG0, GLAT0100,
  DFSCLM00, ISERW (ret).
  DFSTTIM0 posted the CLB with the post code = 'TCO'. Before the
  TCO CLB could be dispatched then DFSICIO0 set CLB3DECB. DFSICLR0
  IPOSTED the same CLB because DFSICLR0 does not check the POST
  bit and DFSTTIM0 does not set CLB3DECB when it posts the CLB.
  

Local fix

Problem summary

• ****************************************************************
  * USERS AFFECTED: All IMS R910 TCO Users                       *
  ****************************************************************
  * PROBLEM DESCRIPTION: ABENDU0780 RC05 when issuing TCO        *
  *                      script loads from batch.                *
  *                                                              *
  *                      Forward fit of PK31091                  *
  ****************************************************************
  * RECOMMENDATION: INSTALL CORRECTIVE SERVICE FOR APAR/PTF      *
  ****************************************************************
  An ABENDU0780 RC05 occurred when TCO script loads were issued
  from a BMP and the System console at the same time.
  
  The abending savearea flow was:
  DFSICIO0, GETASEGM, DOQMGRGU, DFSQRH00, DFSPREQ0, DFSQMGR0,
  DFSQGU00, DFSQLOG0, DFSQLOG0-QLOG92B, DFSFLLG0, GLAT0100,
  DFSCLM00, ISERW (ret).
  
  DFSTTIM0 posted the TCO CLB with the post code = 'TCO'.  Before
  the TCO CLB could be dispatched DFSICLR0 IPOSTED the same CLB.
  DFSICLR0 checks the CLB3DECB bit before posting, but DFSTTIM0
  does not set CLB3DECB when it posts the CLB.
  
  The TCO CLB was dispatched and ran until it waited out of
  DFSCLM00. At that point, the second post from DFSICLR0 came
  through. Since DFSICLR0 was running under a different address
  space (BMP), that created a delay in the actual posting. The
  ABENDU0780 occurred because the DFSICLR0 post was not the
  specific post the latch manager expected.
  
  The dispatcher trace entries in the dump were necessary to
  diagnose the problem.
  

Problem conclusion

• AIDS: RIDS/DCS RIDS/TCO DCS TCO
    DEP: NONE
    GEN:
  
  *** END IMS KEYWORDS ***
  DFSTTIM0 has been changed to set CLB3DECB before posting
  the TCO CLB.
  

Temporary fix

• *********
  * HIPER *
  *********
  

Comments

APAR Information

• APAR is sysrouted FROM one or more of the following:

  PK31091

• APAR is sysrouted TO one or more of the following:

  UK27555

Modules/Macros

• DFSTTIM0
  

Fix information

• Fixed component name

  IMS V9

• Fixed component ID

  5655J3800

Applicable component levels

• R900 PSY UK27555

     UP07/08/02 P F708 Ž