OA50379: ABEND S0C4 DURING RELEASE PROCESSING DUE TO A ZERO SSDWEB POINTER -or- PAUSED TASK REMAINS HUNG AFTER RELEASE.

Obtain the fix for this APAR.

APAR status

• Closed as program error.

Error description

• Either of the following problems may be seen:
  
  Problem 1:
  
  Abend S0C4 (abend0c4) occurs at IEAVERLS+79E (HBB77A0) due to a
  zero SSDWEB pointer. The problem occurs when a release is
  issued for a TCB that had previously been paused and Status
  MCSTEP SET/RESET was issued while paused.
  
  This is the sequence of events that resulted in the S0C4 during
  release processing for the reported problem:
  
  1. A TCB is paused and then STATUS MCSTEP,SET is issued for that
     TCB turning on SSDND_VIA_STATUS.
  2. While the TCB is non dispatchable, an I/O completion SRB
     scheduled the VSAM I/O completion IRB.
  3. The Stage 3 Exit Effector, IEAVEEE0, queued the IRB to the
     nondispatchable TCB and turned on SSDNOT_TOP_RB.
  4. Now when the STATUS MCSTEP,RESET was issued, the IRB was the
     top RB. As its SXSBSSD is zero SSDND_VIA_STATUS is not reset
     by STATUS processing.
  5. The IRB issues the release. It finds SSDNOT_TOP_RB so
     unpauses the task.
  6. The IRB terminates and turns off SSDNOT_TOP_RB but leaves
     SSDND_VIA_STATUS on.
  7. The TCB is now dispatched
  8. The I/O completion SRB schedules the IRB again and so
     IEAVEEE0 turns on SSDNOT_TOP_RB but SSDND_VIA_STATUS is left
     on.
  9. The IRB issues a release. This is a prerelease as the TCB
     is running. As SSDND_VIA_STATUS is on release processing
     expects SSDWEB is non-zero and abends S0C4
  
  The problem does not occur in HBB7790 and below as
  SSDND_VIA_STATUS  is turned off when SSDNOT_TOP_RB is set by
  IEAVEEE0 in step 8.
  
  The release in step 9 does not have to be issued by an IRB
  running under the TCB that had been paused. The problem
  occurs as SSDND_VIA_STATUS is left on in step 6 and not
  turned off in step 8.
  
  Verification steps:
  The SSD/PET for the release that resulted in the S0C4 at
  IEAVERLS can be found at R13?+60. In the reported problem
  this was 03F24F60.
  
  The systrace will show a pause using this SSD/PET followed
  by Status MCStep Set and then Status MCStep Reset while the
  TCB is paused and then the S0C4 at IEAVERLS+79E while the
  TCB is running.
  
  There could be any number of subsequent pause followed by
  release but if a release is issued while the TCB is running
  the S0C4 will occur. There also could be subsequent Status
   MCStep Set and then Status MCStep Reset issued while the TCB
   is running. These will have no effect on the state of
   SSDND_VIA_STATUS in the SSD/PET.
  
  The systrace for the reported problem shows:
  WU-Addr- Ident  CD/D PSW-      Unique-1 Unique-2 Unique-3
  007FEC68  SSRV   11E A14217FC  03F24F60 00000000 00000000
  007991B0  SSRV   12D A0109D28  007991B0 00010000 00000000
  007991B0  SSRV   12D A0109EC8  007991B0 00018000 00000000 ***
  007FEC68  SSRV   11F 840D446A  03F24F60 80000000 007FEC68
  007FEC68  DSP        013C9DD6  00000000 0141E0BF 216B3338
  007FEC68  SSRV   11E A14217FC  03F24F60 00000000 00000000
  007FEC68  SSRV   11F 840D446A  03F24F60 80000000 007FEC68
  007FEC68  DSP        013C9DD6  00000000 0141E0BF 223576F8
  007991B0  SSRV   12D A0109D28  007991B0 00010000 00000000
  007991B0  SSRV   12D A0109EC8  007991B0 00018000 00000000
  007FEC68  SSRV   11E A14217FC  03F24F60 00000000 00000000
  007FEC68  SSRV   11F 840D446A  03F24F60 80000000 007FEC68
  007FEC68  DSP        013C9DD6  00000000 0141E0BF 216B3338
  007FEC68  SSRV   11E A14217FC  03F24F60 00000000 00000000
  007FEC68  SSRV   11F 840D446A  03F24F60 80000000 007FEC68
  007FEC68  DSP        013C9DD6  00000000 20CF9BA8 04472F18
  007FEC68  SSRV   11E A14217FC  03F24F60 00000000 00000000
  007FEC68  SSRV   11F 840D446A  03F24F60 80000000 007FEC68
  007FEC68  DSP        013C9DD6  00000000 0141E0BF 223576F8
  007FEC68  SSRV   11E A14217FC  03F24F60 00000000 00000000
  007FEC68  SSRV   11F 840D446A  03F24F60 80000000 007FEC68
  007FEC68  DSP        013C9DD6  00000000 0141E0BF 216B3338
  007FEC68  SSRV   11E A14217FC  03F24F60 00000000 00000000
  007FEC68  SSRV   11F 840D446A  03F24F60 80000000 007FEC68
  007FEC68  DSP        013C9DD6  00000000 0141E0BF 223576F8
  007FEC68  PGM    004 013C40B6  00040004 00000000
  
  SSRV   11E   = pause with the SSD/PET in Unique-1
  SSRV   11F   = release with the SSD/PET in Unique-1 and the
                 TCB in Unique-3
  SSRV   12D   = Status where Unique-2 = 00010000 is Status
                 MCStep Set
  SSRV   12D   = Status where Unique-2 = 00018000 is Status
                 MCStep Reset
  PSW 013C9DD6 = IEAVEPS1+1A7E (Release point for paused tasks)
  PSW 013C40B6 = IEAVERLS+79E (HBB77A0)
  
  The Status Reset flagged *** is the status processing that left
  SSDND_VIA_STATUS on. The later Status MCStep/Reset had no effect
  on SSDND_VIA_STATUS as TCB 007FEC68 was not paused at that
  point.
  
  
  Problem 2:
  
  A paused task may remain hung in IEAVEPS1 +x'1A7E'(HBB77A0) even
  when RELEASE completes successfully.
  
  The following sequence of events may lead to a task remaining
  hung in IEAVEPS1+X'1A7E':
  
  1. The address space is marked Non-Swappable
  2. TCBb issues PAUSE
  3. STATUS STOP is issued for TCBb
  4. An IRB is queued to TCBb
  5, STATUS START is issued for TCBb
  6. TCBb is released. As SSDND_VIA_STATUS is still set however,
     release processing does not add the WEB to the WUQ and the
     unit of work is never dispatched.
  
  Verification Steps:
  
  1. The address space is non-swappable.
  2. RBOPSW of the RB under the hung TCB will point to
     IEAVEPS1+x'1A7E' (HBB77A0).
  3. Fields XSBALD and XSBALOV in the XSB for the above
     RB will be nonzero, and should contain the same addresses
     as STCBALD and STCBALOV.
  4. The SSD will have FLAGS=x'80' with the description
     'This SSD represents a resumed/released DU'
     (note: the address of the SSD can be found in R3 under the
     regs saved in the TCB)
  5. STCBWEB for the hung task will point to a WEB with
     WEBOFFQ on, and WEBPAUSED off.
  

Local fix

• For Problem 2 - Taking an SVC dump of the job with the hung task
  should alleviate this problem, as the WEB for the hung task will
  be placed on the WUQ, causing it to become dispatched.
  

Problem summary

• ****************************************************************
  * USERS AFFECTED: Users of Pause/Release at HBB77A0            *
  ****************************************************************
  * PROBLEM DESCRIPTION: ABEND0C4 in IEAVERLS                    *
  ****************************************************************
  * RECOMMENDATION:                                              *
  ****************************************************************
  Internal bit SSDND_VIA_STATUS may be left on residually if
  an IRB interrupts a non-dispatchable Paused task.  This
  residual bit can later cause Release processing module
  IEAVERLS to take an incorrect path and abend.
  

Problem conclusion

• IRB-queueing logic is updated to reset SSDND_VIA_STATUS
  when adding an IRB to Paused task.
  

Temporary fix

Comments

APAR Information

• APAR is sysrouted FROM one or more of the following:

• APAR is sysrouted TO one or more of the following:

  UA81691

Modules/Macros

• IEAVEEE0
  

Fix information

• Fixed component name

  SUPERVISOR CONT

• Fixed component ID

  5752SC1C5

Applicable component levels

• R7A0 PSY UA81691

     UP16/06/01 P F605

Fix is available

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