Fixed-point move to or from special-purpose registers instructions

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The instructions move the contents of one Special-Purpose Register (SPR) into another SPR or into a General-Purpose Register (GPR). These include both nonprivileged and privileged instructions.

Several instructions move the contents of one Special-Purpose Register (SPR) into another SPR or into a General-Purpose Register (GPR). These instructions are supported by a set of extended mnemonics that have each SPR encoding incorporated into the extended mnemonic. These include both nonprivileged and privileged instructions.

Note: The SPR field length is 10 bits for PowerPC® and 5 bits for POWER® family. To maintain source-code compatibility for POWER® family and PowerPC®, the low-order 5 bits and high-order 5 bits of the SPR number must be reversed prior to being used as the input operand to the mfspr instruction or the mtspr instruction. The numbers defined in the encoding tables for the mfspr and mtspr instructions have already had their low-order 5 bits and high-order 5 bits reversed. When using the dbx command to debug a program, remember that the low-order 5 bits and high-order 5 bits of the SPR number are reversed in the output from the dbx command.

There are different sets of SPRs for POWER® family and PowerPC®. Encodings for the same SPRs are identical for POWER® family and PowerPC® except for moving from the DEC (Decrement) SPR.

Moving from the DEC SPR is privileged in PowerPC®, but nonprivileged in POWER® family. One bit in the SPR field is 1 for privileged operations, but 0 for nonprivileged operations. Thus, the encoding number for the DEC SPR for the mfdec instruction has different values in PowerPC® and POWER® family. The DEC encoding number is 22 for PowerPC® and 6 for POWER® family. If the mfdec instruction is used, the assembler determines the DEC encoding based on the current assembly mode. The following list shows the assembler processing of the mfdec instruction for each assembly mode value:

  • If the assembly mode is pwr, pwr2, or 601, the DEC encoding is 6.
  • If the assembly mode is ppc, 603, or 604, the DEC encoding is 22.
  • If the default assembly mode, which treats POWER® family/PowerPC® incompatibility errors as instructional warnings, is used, the DEC encoding is 6. Instructional warning 158 reports that the DEC SPR encoding 6 is used to generate the object code. The warning can be suppressed with the -W flag.
  • If the assembly mode is any, the DEC encoding is 6. If the -w flag is used, a warning message (158) reports that the DEC SPR encoding 6 is used to generate the object code.
  • If the assembly mode is com, an error message reports that the mfdec instruction is not supported. No object code is generated. In this situation, the mfspr instruction must be used to encode the DEC number.