Understanding 31-bit addressing

Note to reader
Note to reader This information documents the programming considerations for running 31-bit addressing mode programs on previous versions and releases of MVS™. Because this information might be useful for programmers who maintain or update legacy programs, the chapter is preserved to reflect the programming environment of previous MVS versions. If you intend to design and code a new program to run on z/OS® releases, consider the following:
  • Always design a program to run in 31-bit addressing mode, to take full advantage of the virtual storage capacity of MVS.
  • Use the IBM® High Level Assembler, instead of Assembler H, to assemble the new program. As of MVS/SP 5.2, Assembler H is not supported.
  • Use the program management binder, instead of the linkage editor and loader, to prepare the program for execution.
End of Note to reader

z/Architecture® supports 64-bit real and virtual addresses. For compatibility with Enterprise Systems Architecture (ESA) and 370/Extended Architecture (XA), z/Architecture also supports 31-bit real and virtual addresses, which provide a maximum real and virtual address of two gigabytes minus one. For compatibility with older systems, z/Architecture also supports 24-bit real and virtual addresses.

The basic characteristics of the system that provide for 64-bit and 31-bit addresses and the continued use of 24-bit addresses are:
  • A virtual storage map of two gigabytes with most MVS services to support programs executing or residing anywhere in the first two gigabytes of virtual storage. A virtual storage map of a theoretical 16 exabytes to support programs executing in 64-bit mode.
  • Two program attributes that specify expected address length on entry (addressing mode) and intended location in virtual storage (residence mode).
  • Trimodal operation, a capability of the processor that permits the execution of programs with 24-bit addresses as well as programs with 31-bit and 64-bit addresses.