PGSER macro - is type 2, gets no locks.
Calls module IARPI, entry point IGC138.
GTF data is:
| R0 | ECB address or 0 if no ECB. | |
| R1 | Bit 0 | If 0, then register format (R form). |
| If 1, then list format (L form). | ||
| Bits 1-31 | If R1 bit 0 = 0, then the register contains a 31-bit address of the start of the virtual area. | |
| If R1 bit 0 = 1, then the register contains a 31-bit pointer to the first PSL in the user supplied PSL list. | ||
| R2-R3 | Irrelevant | |
| R4 | TCB address | |
| R5 | RB address | |
| R6-R12 | Irrelevant | |
| R13 | Address of a standard 72 byte save area. | |
| R14 | If R1 bit 0 = 0, for register
format macro, then: Bits 0-15 Reserved |
|
| R15 | If R1 bit 0 = 0, for register format macro, then R15 contains a 31-bit address of the last byte of the virtual area (end address). | |
| If R1 bit 0 = 1, then R15 is irrelevant, and not examined by page services. | ||
| On return, the register contents will be as follows: | ||
| R0 | Unpredictable | |
| R1-R14 | Same as for input | |
| R15 | Return code. | |