Using the SCHEDXIT macro to schedule an IRB

You can use the SCHEDXIT macro to schedule an asynchronous exit to run. The calling program supplies an initialized interrupt queue element (IQE) to the SCHEDXIT macro. The IQE identifies the task the exit routine is to run under and the associated IRB. It also contains information about the exit routine's characteristics.

The caller must initialize the IQE to define to the system the task under which the exit routine is to run. The fields to be initialized are:

IQEPARAM -- optional address of the parameter list to be passed to the exit routine.
IQEIRB -- address of the IRB as returned in register 1 by the CIRB macro.
IQETCB -- address of the TCB for the task under which the user's exit routine is to run.

When IRB/IQE initialization is complete, the caller should invoke SCHEDXIT to queue the request (IQE) to the appropriate system asynchronous exit queue. The caller can invoke SCHEDXIT in one of two ways, depending primarily on the location of the IQE:

If the IQE is in 31-bit storage, the caller must invoke the SCHEDXIT macro. Detailed information about using the SCHEDXIT macro is in z/OS MVS Programming: Authorized Assembler Services Reference LLA-SDU.
If the IQE is in 24-bit storage, the caller can use the SCHEDXIT macro only if the IQE address passed is a clean 31-bit address (that is, the high-order byte of the address is zero). Otherwise, the caller must use branch entry, where the branch entry point address is in field CVT0EF00 of the communications vector table (CVT).
For branch entry, the interface is defined as follows:
Register

Contents

0

Irrelevant

1

Twos-complement IQE address

2-13

Irrelevant

14

Return address

15

Irrelevant

Upon return, the registers contain the following:
Register

Contents

0

Used as a work register by the system

1

True (non-complemented) IQE address

2-13

Unchanged

14, 15

Used as work registers by the system

Whether the caller uses the SCHEDXIT macro or branch entry, the caller must:

Hold the local lock
Have addressability to the address space in which the exit routine is to be dispatched
Be in supervisor state with PSW key zero.