Unparalleled Partnerships in Academia Including SUNY, RPI, and MIT Uniquely Position New York for Chip Innovation and R&D Hub
Today’s chip shortage shows we must immediately strengthen American leadership by moving semiconductor innovations into prototyping and production to strengthen our supply chains, economy, and national security.
The global semiconductor shortage continues to cause grave disruptions to supply chains, threatening American businesses, consumers, and our national security. Without these critical components, many companies have been forced to halt production, and consumers are unable to purchase goods or are forced to pay higher prices for products integral to their daily lives — like cars, computers, and dryers.
The ongoing chip shortage exposes the lack of domestic investment in the semiconductor industry and is proof positive that the United States needs to rethink its approach and increase investment in the areas of chip innovation, packaging, and manufacturing.
Congress must fund the CHIPS Act and should place the R&D hub of the NSTC at a proven chip innovation ecosystem with first-class facilities, scientists, and partners.
Congress must immediately finish work on the U.S. Innovation and Competition Act, including fully funding the CHIPS for America Act, which establishes the National Semiconductor Technology Center (NSTC) to allow industry and academic partners to work hand-in-hand to advance a technology development roadmap that will alleviate the global chip shortage and provide a secure, domestic supply chain for the future.
As New York Governor Kathy Hochul recently wrote in Bloomberg, the NSTC should rely on a proven chip innovation ecosystem like Albany Nanotech where it could draw on an array of infrastructure already in place, and that is backed by partner companies, academic institutions, and a skilled workforce. For the NSTC to be most effective quickly, R&D should be placed in an ecosystem capable of continually moving new chip designs to production, ensuring collaboration on advanced semiconductor R&D, and meeting the full spectrum of U.S. economic and national security needs. Under the banner of NSTC, access to the Albany innovation ecosystem hub would be extended to a national network of partner companies, universities, workforce partners, and startups to create a true national innovation capability and broad technical roadmap to drive innovation across the entire semiconductor supply chain.
Additionally, the NSTC should focus on leading technology development, prototyping and advanced packaging, and technology transfer to manufacturing. The technology transfer capability is crucial as it would enable design transfer to manufacturing and provide needed flexibility in the domestic semiconductor supply chain to support both government and commercial needs.
Albany Nanotech is the Most Advanced 300mm Public-Private Collaborative Semiconductor R&D Facility in the Country
NY CREATES and industry partners have been successfully unlocking groundbreaking innovations in nanotechnology and semiconductor research for decades. The Albany network is the product of $15 billion in public and private investment over two decades. IBM has been part of the ecosystem since 2002, which now boasts more than 2,700 industry experts, staff, students, and faculty who leverage the center to produce leading edge semiconductor innovations. The center has fostered a public-private partnership with the state of New York and equipment, materials, and manufacturing companies to achieve significant technological breakthroughs that are shaping the next generation of semiconductor innovation.
Through sustained investments and a collaborative R&D ecosystem approach, scientists in Albany are continuing to push the boundaries of semiconductor technology. For example, Albany Nanotech pioneered work in cutting-edge technologies such as extreme ultraviolet lithography (EUV), and is still the only facility in the country conducting collaborative research on EUV. IBM researchers, along with ecosystem partners, announced the 7nm chip breakthrough in 2015 [R. Xie et al, IEDM 2016], which led to the POWER systems product announcement in 2021. The Albany ecosystem has continued to be the hub of innovations for semiconductor chips, including first demonstrations of novel device architectures such as nanosheet. [N. Loubet et al., VLSI 2017]
These advancements have real impacts on business outcomes, consumers’ lives, and our national security. For instance, the latest 2 nanometer node chip built at Albany Nanotech in 2021 would enable 45% performance improvement over today’s 7nm chip using the same amount of power or it could mean 75% power savings at the same performance level. This could translate to a longer life of your cell phone battery and significantly reduce the carbon footprint of data centers.
In the past half decade, the Albany ecosystem has made significant inroads in setting up state of the art 14nm Magnetic Random Access Memory (MRAM) technology [D. Edelstein et al., IEDM 2020] and 14nm analog in-memory compute technology for AI applications [R. Khaddam-Aljameh et al., VLSI 2021, P. Narayanan et al., VLSI 2021]], and made investments to enable a world-class micro-bump facility. The work enabled by the launch of the IBM Research AI Hardware Center in 2019 has delivered significant progress in new heterogenous integration techniques like advanced silicon bridges [K. Sikka ECTC 2021], ultra-dense substrate innovations and through silicon via (TSV)-enabled 3-D Integration technologies. This has resulted in the Albany ecosystem being well positioned to lead the way for national research in Heterogenous Integration and ‘More than Moore’ technologies.
Albany’s collaborative 300mm infrastructure, including nationwide partnerships in academia, makes it ready to host the innovation hub of the NSTC today.
Time is of the essence, and well-established partnerships with universities and academic institutions, like at Albany NanoTech, are essential for the United States to retain leadership in semiconductors. Higher education institutions not only provide a diverse and qualified workforce pipeline, but also include a network of unique research facilities and deep connections to local and regional economies around the country, helping enable small businesses, entrepreneurs, and start-ups.
The breadth of academic partnerships in Albany NanoTech, including State University of New York’s (SUNY), Rensselaer Polytechnic Institute (RPI), and neighbor MIT in Massachusetts, means diverse representation in thought, background, and expertise. And we are continuing to rapidly expand our university partnerships to include community colleges, Historically Black Colleges and Universities (HBCUs) and others around the country to facilitate educational and training opportunities in semiconductors for a broad, diverse student community.
Our breadth of academic partnerships also means access to some of the best research centers and experts in the world, which through a sustained and well-funded national approach, are capable of even greater semiconductor breakthroughs. Albany NanoTech’s wide and unique partnerships with academic institutions — not just in Albany, but around the country — are invaluable to augmenting the research and development pipeline, promoting a diverse and talented semiconductor workforce, and translating technology into business and consumer solutions that strengthen our economy and national security.
Placing the innovation hub of the NSTC in Albany Would Help New Yorkers and Americans Across the Country
Critically, by leveraging this proven ecosystem, the innovation hub of the NSTC could be operational at Albany in as little as 6-12 months. The quicker the NSTC hub is implemented, the faster consumers and businesses will see results.
The highly successful public-private model cultivated in Albany can be leveraged and augmented through the NSTC, which would allow further technological breakthroughs, benefit businesses, consumers, and our national security, and enable the United States to retain its rightful place as the leader in semiconductor technology.
R. Xie et al., “A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels,” 2016 IEEE International Electron Devices Meeting (IEDM), 2016, pp. 2.7.1-2.7.4, doi: 10.1109/IEDM.2016.7838334.
N. Loubet et al., “Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET,” 2017 Symposium on VLSI Technology, 2017, pp. T230-T231, doi: 10.23919/VLSIT.2017.7998183.
D. Edelstein et al., “A 14 nm Embedded STT-MRAM CMOS Technology,” 2020 IEEE International Electron Devices Meeting (IEDM), 2020, pp. 11.5.1-11.5.4, doi: 10.1109/IEDM13553.2020.9371922.
R. Khaddam-Aljameh et al., “HERMES Core – A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing,” 2021 Symposium on VLSI Circuits, 2021, pp. 1-2, doi: 10.23919/VLSICircuits52068.2021.9492362.
P. Narayanan et al., “Fully on-chip MAC at 14nm enabled by accurate row-wise programming of PCM-based weights and parallel vector-transport in duration-format,” 2021 Symposium on VLSI Technology, 2021, pp. 1-2.
K. Sikka et al., “Direct Bonded Heterogeneous Integration (DBHi) Si Bridge”. 2021 IEEE 71st Electronic Component and Technology Conference (ECTC), Proceedings, p. 136
Share this post: