IBM Card Planning

Work to develop PCB card definitions within a system including their interconnection, major component placement, and cross-section definitions ensuring each fits within the chassis’ constraints.

The IBM Card Planning team works with system architects and other engineering skills to create a cost-sensitive plan for system electronic implementation within a specific system’s chassis. These experts create a detailed placement and wiring plan of all cards in a system to enable efficient card design execution. This planning also includes connector interface pin counts and assignments, card sizing and mounting locations, main component locations, high speed bus routing paths, and power shapes and planes. This team plays an essential role in determining the high-level design of the system and turning the idea into a real product. IBM experts are available to contribute their exceptional skills to your electrical system development needs.

System Card planning includes:

  • Creation of detailed component placement and signal wiring plans to enable efficient execution of the card development phases
  • Determine connector interface pin counts to enable early connector selection
  • Collaborate cross-functionally to define card sizes and mounting locations
  • Establish main component locations to achieve maximum net lengths 
  • Define high-speed bus routing paths and enough wiring channels to meet length and spacing constraints


  • Define power planes and shapes with sufficient copper including layer assignments and signal referencing
  • Define connector pin assignments for all interfaces and with compliance for signal and power integrity
  • Define major bus connectivity rules
  • Determine cross-section or stack-up definition
  • Preliminary PCB layout provided in Cadence’s Allegro PCB Editor with major component placement, high-speed bus routing paths and layer assignments, and early power plane assignments

CAE Methods, and Tools:

  • Cadence Allegro CB Editor
  • Cadence Allegro Design Entry
  • Cadence Allegro System Architect
  • Cadence Symbol Editor

IBM System Architecture Engineering

Develop system level design specifications, providing technical guidance to the engineering teams.

The system architect is responsible for system definition and design execution. The architect ensures the system content and operation will meet the requirements as defined by the IBM offering management team, based on customer requirements. Once assigned to a system, the architect leads system design execution from the concept phase acceptance to the GA (general availability) to the customer. The system architect develops the system design workbook documentation to the design teams which contains the technical detail descriptions of all facets of the server. IBM’s experts can offer these skills for your team’s design needs.

System Architect responsibilities:

Concept phase:

  • Mechanical team determines the packaging details which meet the defined specifications. This includes all phases of power, packaging and cooling of the server in the defined space.
  • Electrical team determines card packaging details based on mechanical definitions. Card and connector technologies are chosen. This includes power delivery as well as covering signal and power integrity assumptions to meet the defined performance

Design execution phase:

  • Provide system design workbook which provides proper definition for detailed logic design implementation.
  • Ensure that the detailed mechanical implementation (cooling, acoustics, emc, emi) are meeting the defined system specifications.
  • Interlock with program management that the execution phase meets the required power on and GA requirements for the product.
  • Provide mediation with the design teams to solve design challenges and assist in resolution to allow execution.

Verification phase:

  • During electrical and environmental test phases, provide guidance on any issues.
  • Provide system workbook documentation updates per design and test findings

IBM Signal Integrity Engineering

Leading innovative solutions to ensure signal integrity of systems with data rates of 50Gb/s and beyond

The signal integrity engineering team leverages advanced electromagnetic simulation methods and measurement techniques to ensure server bus signal integrity for industry standard and IBM proprietary busses on Power Series server hardware. Our engineering team is made up of industry leaders in signal integrity analysis and design, with experience designing successful channels that operate up to 50Gb/s data rates and beyond. This includes modeling and simulation of high-speed bus components using commercial 3D electromagnetic modeling tools, as well as performing time domain simulations of entire channel topologies using internal IBM software. The channel topologies are realized within IBM server systems in complex multilayered PCB stackups, while maintaining proper signal integrity performance by adhering to rules developed from signal integrity simulations using IBM proprietary tools. Lab verification of the signal integrity performance on the system busses are performed with cutting edge measurement technology, both in the frequency and time domain to ensure proper timing and bus performance. Full channel model-to-hardware correlation is also performed to guarantee proper system field performance and quality.

Modeling Methods and Tools:

  • Electromagnetic modeling using ANSYS FEM EM Suite, Keysight ADS, and CST Microwave Studio.
  • Full channel topology time domain simulation using internal IBM HSSCDR software.
  • Design and validation of proprietary buses such as OpenCAPI, OMI, and SMP, as well as industry standards, such as PCIe, USB, I2C, SPI, and reference clocks.
  • Model optimization through use of machine-learning algorithms to optimize bus performance.
  • Card design and evaluation using Cadence Allegro.

Test/Validation Methods and Tools:

  • Frequency and time-domain analysis of buses 50 Gb/s and beyond.
  • Post-measurement data processing using Keysight PLTS.
  • Custom test-vehicle development and usage.
  • Cutting edge measurement technology using industry standard lab equipment, such as Vector Network Analyzers (VNA), Oscilloscopes, BERT, and TDR systems.

IBM Design for eXcellence

Working to create safe and reliable products at manufacturing level and beyond

IBM’s Design for eXcellence team improves design safety, minimizes field failures, increases reliability, and enables testing and manufacturing. These experts perform automated and manual reviews dedicated to eliminating issues with high voltages, spacing violations, temperature sensitivities, and more. These processes can be implemented into your designs to ensure the cards can be manufactured faster, with higher yield, increased safety, high reliability, and at lower costs.

Design for eXcellence Processes and Tools:

  • Anti-Smoke Review Process
  • Cadence Allegro PCB Editor
  • Extensive collaboration with all stakeholders


  • Minimum spacing checks for:
    • Board vias
    • Component pins
    • Voltage shapes
    • Solder mask
    • Card edge to internal layers

IBM PCB Circuit Design

Working to power and enable your quality PCB designs efficiently

IBM’s highly skilled experts can provide support for circuit design needs. The circuit design team provides proper communication between building block devices within a system by designing the logic and physical layout of circuits that power and enable the system’s electronics. This team performs validation testing on all designs to ensure functionality and quality are met within the design and components’ specifications. Additionally, this team is highly skilled in trouble shooting and can find root cause of issues as they arise. They are available to aid you in constructing high performing designs that will drive your ideas to production.


  • Component evaluation and specification
  • Schematic creation
  • System-level circuit design
  • Validation
  • Trouble shooting
  • Image creation for PCIe switches and UCD

Design expertise:

  • Operational panel design
  • Service processor implementation
    • BMC
  • PCIe Switches
  • Power sequencing
  • Industry Standards
    • I2C
    • DDR
    • SPI