Power 4

The First Multi-Core, 1GHz Processor

In 1996, a hand-picked team of some 250 system and chip designers, software architects, researchers and semiconductor engineers set out to pull IBM out of last place in the fast-growing US$7 billion UNIX ^® -server segment.

The power of POWER

IBM technologist Jennifer Chu holds an IBM POWER^® microprocessor, the chip at the core of everything from game consoles to powerful supercomputers. In Beijing in 2005, more than a dozen companies, including Sony and IBM, announced the formation of Power.org, an open-standards community intended to accelerate collaboration on the POWER chip.

Each POWER4 chip contains 174 million transistors—about 10 times more than those used in today's personal computers. A mile of microscopic copper wiring connects the components.

National TRUST Bank of Russia

The National TRUST Bank of Russia selected five IBM POWER7 servers to be the backbone of its new infrastructure as it reorganizes 140 branches and offices in 171 cities across Russia. With the new system, the bank expects to increase performance by 33 percent, while reducing operating costs by 30 percent. Power consumption is also expected to be reduced by 45 percent. One benefit from the increased performance and high data processing speeds is business analytics, enabling TRUST Bank to increase the speed of decision making and gain greater insight into emerging trends.

National Microfinance Bank (Tanzania)

IBM’s new office in Dar es Salaam, Tanzania serves a growing base of clients such as the National Microfinance Bank (NMB). IBM is helping transform the bank’s core infrastructure and support business growth. With the new system based on IBM POWER technologies, NMB has been able to increase its customer base to 1.4 million accounts, expand its number of ATMs to 400, and offer debit cards and mobile banking services to its customers across the country. Today, the bank processes millions of transactions per month and has some of the fastest transaction processing times in Tanzania.

They intended to leapfrog competitors such as Sun Microsystems, Digital Equipment Corporation and HP with an entirely new system, one that would offer twice the performance at half the cost.

To meet that lofty goal, they successfully put two high-performance microprocessor cores on a single silicon chip—an industry first. At the same time they developed an entirely new computer architecture. More of a new system than a new chip, their invention, called IBM ^® POWER4, combined the best of commercial, scientific and high-performance computing in a single design.

The first new system introduced with POWER4, an IBM eServer pSeries ^® server called IBM Regatta, more than doubled the performance standard at half the price of the nearest competitor. Computing business magazine eWeek wrote: “The newly designed 1GHz Power4 represents a tremendous leap over its predecessor, the 450MHz Power3.”

Industry analyst Brad Day of Giga Information Group said at the time: “IBM is getting very aggressive, and this server is a game changer.” Microprocessor research company Cahners In-Stat/MDR (MicroDesign Resources) awarded the new POWER4-based system its Analysts’ Choice Award for Best Workstation/Server Processor of 2001. Kevin Krewell, analyst at In-Stat/MDR, said of the award for the POWER4 architecture, “The scores lead all other server processors by a significant margin.”

This was just the beginning. Follow-on versions—IBM POWER5, POWER6 ^® and POWER7 ^® —became the heart of IBM’s current line of industry-leading IBM Power Systems™ and Power Systems Express computers used by large and midsize companies alike.

Watson, the natural-language speaking computer which appeared as a contestant on the American television quiz show Jeopardy!, was built on POWER7 technology. [Read more about this Icon of Progress]

“Back in 1996, we ranked fifth out of five companies in the UNIX segment,” says Vijay Lund, now vice president of Cross-IBM Offerings in IBM’s Software Group. Lund, who had been working on IBM mainframe systems at the time, was asked to assess what IBM needed to do to gain the lead in the UNIX systems segment.

He reported that a radical new microarchitecture, a much faster, more powerful microprocessor, and bullet-proof system design would be needed to do the job. The key question was, could the IBM team deliver on these lofty goals on schedule?

In a meeting with IBM Senior Vice President Nick Donofrio, Lund recommended IBM build its own microprocessor for the new systems. “I was thinking about the long term,” says Lund. “If we did it ourselves, I knew we would get it right, and our solution would be a starting point for a series of competitive systems—not just a one-time step forward.”

Lund assembled what then CEO Lou Gerstner came to refer to as an “A-Team” of developers from IBM locations at Austin, Texas; Toronto and Bromont, Canada; Boeblingen, Germany; Burlington, Vermont; and Poughkeepsie, East Fishkill and the Watson Research Center in NY. He also established an outside alliance with Hitachi, which would build part of the new processor’s on-chip memory, called a Level 3 cache.

Rule of thumb in 1996 said complex developments of this magnitude fall apart unless the key people work under the same roof. To beat those odds, the team perfected early versions of distance collaboration tools, such as remote desktop sharing. Lund also mitigated a design balance of risk versus caution by pairing high-risk takers with seasoned realists, causing a minor uproar about “creating too much conflict.”

The creative friction paid off. During four years of intense effort, the team decided to combine two processors on a single chip. It had never been done. But if it worked, it would solve their design demands for more power and more speed—and establish performance benchmarks far in advance of the known competition.

In 2001, IBM introduced the world’s first multicore processor, a VLSI (very-large-scale integration) chip with two 64-bit microprocessors comprising more than 170 million transistors.

This breakthrough design in architecture and semiconductor engineering allowed these two processors to work together at a very high bandwidth with large on-chip memories, and with high-speed busses and input/output channels.

“Everything about IBM’s Power4 processor is amazing. Amazing technology, amazing size (680 million transistors), amazing power requirements, amazing performance. And it’s amazing that anything so complex can work at all. This beast has 5,200 pins on the package and consumes 500 watts (that’s right, half a kilowatt) of power.”

Jim Turley

“64-Bit CPUs: Alpha, SPARC, MIPS, and POWER,” PC Magazine

February 21, 2002

“In the networked world of the Internet, a server built around Power4 chips will probably have much more of an impact on your personal computer than a gigahertz chip on your desk, because it will enable, for example, faster response times on eBay auctions and speedier delivery of search requests.”

Peter H. Lewis

“STATE OF THE ART: With 2 New Chips, the Gigahertz Decade Begins,” The New York Times

March 9, 2000

“Germany’s Max Planck Society tapped IBM to build a supercomputer around the company’s upcoming Power4 chip …The scientific organization will use the computing system to make close to 3.8 trillion calculations per second. Scientists are likely to focus their attention on studying instabilities at the atomic level in the structure of proteins. Those instabilities could be responsible for a number of diseases, including mad cow disease and the form that strikes humans, known as Creutzfeld-Jakob disease.”

Ashlee Vance

“IBM to Build Supercomputer Around Its Power4 Chip,” Computerworld

May 17, 2001

“With a 0.18-micron process and copper interconnects, there are a much larger number of transistors available to the designers. One way to put them to use is to put two processor cores on the same die, and take advantage of the very high bandwidth possible between them.”

Carl Anderson

IBM distinguished engineer

“IBM to Unveil Power4 Processor at Hot Chips,” EE Times, by David Lammers

August 4, 1999

Four of these new microprocessors working together as a powerful 8-way module established a new industry standard and produced a then-record clock speed of 1.3 gigahertz. Self-healing technology built into the design catapulted IBM’s mid-range systems overnight into near-mainframe levels of reliability and availability—a major achievement in itself.

According to Jim Kahle, one of the POWER4 design architects, the new chip and its architecture were designed from the ground up with server roles in mind. The POWER4 chip, for example, came with a data throughput rate with its cache memory of more than 100 gigabytes per second, and had chip-to-chip communications modules operating at over 35 gigabytes per second.

Carrie Altieri, now vice president of communications for IBM’s Systems Technology Group, helped shepherd the breakthrough technology to market in 2001. “The impact was instant and huge,” she says. “The analyst community told us it literally blew their socks off. In a very short time we went from last place to industry leader.”

In the arcane world of CPU design, IBM engineers and scientists had, among other features, broken new ground in pipelining, multithreading, binary compatibility, very-high-frequency design, symmetrical multiprocessing and distributed-switch interconnect topology.

In much simpler terms, IBM’s J. M. Tendler and four co-authors wrote in the IBM Journal of Research & Development, “In the ongoing debate between the ‘speed demons’ (high clock rate) and the ‘brainiacs’ (more complex design but a higher instructions-per-cycle rate), IBM UNIX-based systems have traditionally been in the brainiac camp. With the POWER4, IBM opted to also embrace the speed-demon approach.”

More than that, the new system-level architecture introduced with POWER4 and its follow-on versions allowed IBM to combine its commercial and high-performance lines—legacy IBM AS/400 ^® and IBM RS/6000 ^® systems, known then as the IBM eServer iSeries ^® and pSeries—into the company’s acclaimed Power Systems. The unique differences between throughput systems and systems optimized for number crunching had disappeared.

POWER4 and the extreme effort needed to invent it represent what Lund calls one of IBM’s major assets. “It’s our ability,” he says, “to draw upon talent from all over the world, design all the pieces of a very complex project, and bring them together to create an entirely new technology, and a new system built around that technology. It is what we do best.”

Selected team members who contributed to this Icon of Progress:

Carl Anderson Responsible for innovations in the POWER4 circuit design, tools, methodology, manufacturing and I/O subsystem
Roch Archambault Responsible for innovations in POWER4 compiler technologies
Ravi Arimilli A chief architect of the POWER4 multi-core, integrated and distributed cache, memory
Robert Blainey Responsible for innovations in POWER4 compiler technologies
Geoffrey Blandy Responsible for industry leadership performance and functions in IBM AIX ^® 5.1.C
Harold Chase Responsible for innovations in POWER4 circuit design, tools, methodology and manufacturing
Bing-Lun Chu Responsible for advances in POWER4 design, verification, instrumentation and test technologies
Leo Clark A chief architect of the POWER4 multi-core, integrated and distributed cache, memory and I/O subsystem
Steve Fields Responsible for advances in POWER4 design, verification, instrumentation and test technologies
Jim Kahle A chief architect of the POWER4 superscalar, superspeculative, out-of-order, high frequency core
Jan Klockow One of the chief architects of POWER4 system design and innovations in power, packaging and cooling technologies
Hung Le A chief architect of the POWER4 superscalar, superspeculative, out-of-order, high frequency core
Hye-Young McCreary Responsible for industry leadership performance and functions in AIX 5.1.C
Bradley McCredie One of the chief architects of POWER4 system design and innovations in power, packaging and cooling technologies
James McInnes Responsible for innovations in POWER4 compiler technologies
Bruce Mealey Responsible for industry leadership performance and functions in AIX 5.1.C
Chet Mehta Responsible for innovations in POWER4 firmware technologies
Michael Nealon One of the chief architects of POWER4 system design and innovations in power, packaging and cooling technologies
Kevin Reick Responsible for advances in POWER4 design, verification, instrumentation and test technologies
Edward Seminaro One of the chief architects of POWER4 system design and innovations in power, packaging and cooling technologies
James Warnock Responsible for innovations in POWER4 circuit design, tools, methodology and manufacturing
David Willoughby Responsible for innovations in POWER4 firmware technologies