Register usage conventions
The PowerPC® vector extension architecture adds 32 vector registers (VRs).
The PowerPC Vector Extension architecture adds 32 vector registers (VRs). Each VR is 128 bits wide. There is also a 32-bit special purpose register (VRSAVE), and a 32-bit vector status and control register (VSCR). The VR conventions table shows how VRs are used:
| Register | Status | Use |
|---|---|---|
| VR0 | Volatile | Scratch register. |
| VR1 | Volatile | Scratch register. |
| VR2 | Volatile | First vector argument. First vector of function return value. |
| VR3 | Volatile | Second vector argument, scratch. |
| VR4 | Volatile | Third vector argument, scratch. |
| VR5 | Volatile | Fourth vector argument, scratch. |
| VR6 | Volatile | Fifth vector argument, scratch. |
| VR7 | Volatile | Sixth vector argument, scratch. |
| VR8 | Volatile | Seventh vector argument, scratch. |
| VR9 | Volatile | Eighth vector argument, scratch. |
| VR10 | Volatile | Ninth vector argument, scratch. |
| VR11 | Volatile | Tenth vector argument, scratch. |
| VR12 | Volatile | Eleventh vector argument, scratch. |
| VR13 | Volatile | Twelfth vector argument, scratch. |
| VR14:19 | Volatile | Scratch. |
| VR20:31 | Reserved (default mode) Non-Volatile (extended ABI mode) | When the default vector enabled mode is used, these registers are reserved, and must not be used. In the extended ABI Vector enabled mode, these registers are non-volatile and their values are preserved across function calls. |
| VRSAVE | Reserved | In the AIX® ABI, VRSAVE is not used. An ABI-compliant program must not use or alter VRSAVE. |
| VSCR | Volatile | Vector status and control register. Contains saturation status bit and other than Java™ mode control bit. |
The AltiVec Programming Interface Specification defines the VRSAVE register to be used as a bitmask of vector registers in use. AIX® requires that an application never modify the VRSAVE register.