systemcfg.h File

Purpose

Defines the _system_configuration structure.

Note: For the complete list of system configuration fields, see systemcfg.h header file in the /usr/include/sys directory. To retrieve the values of system configuration fields programmatically, use the following interfaces:

Preferred system call for accessing configuration parameters

getsystemcfg()

Macro for better performance

GET_SYSCFG()

For more information, see getsystemcfg Subroutine.

Description

The systemcfg.h file defines the _system_configuration structure, which is a global structure that identifies the system characteristics. The system memory that is read only provides the _system_configuration structure. The _system_configuration structure attributes contain the following values:

Table 1. System Configuration Attributes
Item	Description
architecture	Identifies the architecture of the processor. The following values are the valid values for version 4: POWER_RS Indicates a POWER family system. POWER_PC Indicates that a POWER processor-based.
implementation	Identifies the specific version of the processor. A unique bit is assigned to each implementation to efficiently check the implementation sets. The following values are examples of valid values: POWER_RS1 POWER_RS2 POWER_RSC POWER_601 Note: The header file contains more values. Two special values, POWER_RS_ALL and POWER_PC_ALL are defined. These labels are defined as the bit OR of all members of their architecture.
version	Identifies the version number of the central processing unit (CPU). The following values are examples of valid values: PV_RS1 Identifies a POWER family RS1 system. PV_RS2 Identifies a POWER family RS2 system. PV_RS2G Identifies a POWER family RS2 system with graphics assist. PV_RSC Identifies a POWER family RSC system. PV_601 Identifies a PowerPC 601 RISC Microprocessor system. Note: The header file contains more values.
width	Contains the processor data-word size. The valid values are 32 or 64. This value is the maximum data-word size and does not confuse with the current execution mode.
ncpus	Identifies the number of CPUs active on a system. The uniprocessor (UP) systems are identified by a 1. The values greater than 1 indicate multiprocessor (MP) systems.
cache_attr	Specifies the cache attributes. Bit 31 Determines the presence of the cache. Bit 31 is 1 Cache is present. Bit 31 is 0 Cache is not present. The other cache characteristics are 0 Bit 30 Indicates the type of cache. Bit 30 is 1 Cache is combined Bit 30 is 0 The instruction and data caches are separate
icache_size	Contains the size of the L1 instruction-cache that is in bytes. For combined caches, this value is the total cache size.
dcache_size	Contains the size of the L1 data-cache size in bytes. For combined cache, this value is the total cache size.
icache_asc	Contains the L1 instruction-cache associativity. For a combined cache, this value is the associativity of the combined cache.
dcache_asc	Contains the L1 data-cache associativity. For a combined cache, this value is the associativity of the combined cache.
icache_line	Contains the line size in bytes of the L1 instruction cache.
dcache_line	Contains the line size in bytes of L1 data cache.
L2_cache_size	Contains the size of the L2 cache in bytes. A value of 0 indicates that the L2 cache is not present.
L2_cache_asc	Identifies the associativity of the L2 cache.
tlb_comb	Identifies the type of Transaction Lookaside Buffer (TLB) attributes. Bit 31 Determines the presence of the TLB. Bit 31 is 1 TLB is present. Bit 31 is less than 0 TLB does not exist. All other TLB characteristics are 0 Bit 30 Indicates the type of TLB. Bit 30 is 1 TLB is combined Bit 30 is 0 TLB is separate for the instruction and data cache
itlb_size	Specifies the number of entries in the instruction TLB. For combined TLBs, this value is the size of the combined TLB.
dtlb_size	Specifies the number of entries in the data TLB. For combined TLBs, this value is the size of the combined TLB.
itlb_asc	Includes the associativity of the instruction TLB. If the system is fully associative, the value of the attribute equals to itlb_size attribute.
dtlb_asc	Includes the associativity of the instruction TLB. If the system is fully associative, the value of the attribute equals to dtlb_size attribute.
resv_size	Includes the POWER processor-based reservation granule size. This field is a 0 on POWER family systems.
priv_ick_cnt	Includes the number of times lock services attempt to lock a spin lock before you block an AP process or thread in supervisor mode. This field is a 0 on the UP system. The system-locking services use the priv_ick_cnt parameter.
prob_lck_cnt	Includes the number of times lock services attempt to lock a spin lock before you block a process or thread in a problem state. This field is a 0 on a UP system. The system-locking services use the prob_lck_cnt parameter.
virt_alias	Indicates virtual memory aliasing. If the value is 1, the hardware is available for virtual memory aliasing and is used by the system. The virtual memory aliasing maps one real address to more than one virtual address.
cach_cong	Includes the number of page index bits that result in a cache synonym. For systems without cache synonyms, this field is 0.