PSW Mapping Algorithm

PSW Conversions During Interruption Processing describes a case when it is necessary to convert, when using 370 Accommodation, an EC-mode PSW to a BC-mode PSW. If that is not possible without losing information, the EC-mode PSW is converted instead into a mapped PSW. This section describes the details of that conversion. This information is presented for diagnostic purposes only.

If an EC-mode PSW cannot be converted directly to a BC-mode PSW without losing information, it is transformed according to the following table:

Table 1. Converting an EC-mode PSW to a mapped PSW. This table shows what happens to each bit of an ESA-family EC-mode PSW as it gets converted to a mapped PSW during interruption presentation. This conversion only occurs for PSWs that cannot be converted without loss of information.
Bit Positions in Original EC-mode PSW	Meaning in EC-mode PSW	Bit Positions in New Mapped PSW	Explanation
0	Unassigned	N/A	A 1 in this position will prevent conversion.
1	PER	13	This bit position is vacated in order to free up contiguous bits for the addressing mode and high-order bits of the instruction address.
2-4	Unassigned	N/A	A 1 in any of these positions will prevent conversion.
5	DAT	N/A	A 1 in this position will prevent conversion.
6	I/O enablement	6	This bit is left in this position in case it is manipulated by the interruption handler.
7	External enablement	7	This bit is left in this position in case it is manipulated by the interruption handler.
8-11	Key	11	CMS typically uses only keys X'0' and X'E' in the PSW. These values will be converted to B'0' and B'1', respectively. Any other PSW key will be converted to B'0'.
12	EC mode	N/A	A 0 in this position will prevent conversion. Bit 12 of the new mapped PSW will be set to 0 to indicate BC mode. This guarantees that the mapped PSW has an early format error associated with it, which in turn ensures that CP will be notified if this mapped PSW is ever re-loaded.
13	Machine-check enablement	N/A	This bit will be ignored in the EC-mode PSW. When the mapped PSW is later re-loaded, the machine-check enablement bit will be set to 0.
14	Wait state	14	This bit is left in this position in case it is manipulated by the interruption handler.
15	Problem state	N/A	A 1 in this position will prevent conversion. Bit 15 of the new PSW will be set to 1 to indicate the PSW is a mapped PSW.
16	Address-space control for ESA or Z; unassigned for XC	N/A	A 1 in this position will be ignored. If the virtual machine is in ESA mode or Z mode, the bit is not effective anyway (PSW bit 5 is off). If the virtual machine is in XC mode, the bit must be 0.
17	Address-space control for ESA or Z; AR-mode for XC	10	This bit is preserved because if the virtual machine is in XC mode, this bit position indicates access-register mode.
18-19	Condition code	34-35	Relocate to positions assigned for this field in a BC-mode PSW.
20-23	Program mask	36-39	Relocate to positions assigned for this field in a BC-mode PSW.
24-31	Unassigned	N/A	A 1 in any of these positions will prevent conversion.
32	Addressing mode	0
33-37	Bits 1-5 of instruction address	1-5
38-39	Bits 6-7 of instruction address	8-9
40-63	Bits 8-31 of instruction address	40-63

The following table shows the converse, which is where each bit of the resulting mapped PSW originates:

Table 2. Constructing a mapped PSW. This table shows where each bit of the resulting mapped PSW originates, when an ESA-family EC-mode PSW is converted to a mapped PSW during interruption presentation. This conversion only occurs for PSWs that cannot be converted without loss of information.
Bit Positions in Resulting Mapped PSW	Meaning in BC-mode PSW	Bit Positions in Original EC-mode PSW	Explanation
0	Channel 0	32	Addressing mode bit of original EC-mode PSW
1-5	Channels 1-5	33-37	Bits 1-5 of instruction address in EC-mode PSW
6	I/O enablement	6
7	External enablement	7
8-9	Key bits 0-1	38-39	Bits 6-7 of the instruction address in EC-mode PSW
10	key bit 2	17	The access-register-mode bit for XC-mode virtual machines
11	Key bit 3	8-11	The 4-bit key in the EC-mode PSW will be encoded into one bit for the mapped PSW.
12	BC/EC mode	N/A	Bit 12 of the new mapped PSW will be set to 0 to indicate BC mode
13	Machine-check enablement	1	PER bit of original EC-mode PSW
14	Wait state	14
15	Problem State	N/A	This bit will be set to one in the new mapped PSW. It and bit 12 are the flags that this BC-mode PSW is actually a mapped PSW.
16-31	Interruption code	N/A	This field is the reason behind the conversion. When the interruption is presented, bits 16-31 of the interruption old PSW will contain the interruption code appropriate for the interruption.
32-33	ILC	N/A	When the interruption is presented, bits 32-33 of the interruption old PSW will contain the instruction-length code appropriate for the interruption.
34-35	Condition code	18-19
36-39	Program mask	20-23
40-63	Bits 8-31 of instruction address	40-63

When a mapped PSW is loaded, it is converted back into an approximation of the original EC-mode PSW from which it was formed. This conversion takes place whenever the loaded PSW has bit 15 set to one, and bits 1-5, 8-9, and 12 set to zero. Any other loaded PSW with bit 12 set to zero is treated like a normal BC-mode PSW.