Assembler examples

Address formed from a register that contains zero

In this example, a null address detection event occurs because the load instruction L R4,12(,R5) accesses storage by using an operand address that is formed from register 5, and register 5 contains zero. The z/TPF debugger stops the application at the LTGR R4,R4 instruction, which immediately follows the load instruction where the event occurs.

QDBWA1F8_LOOP1  DS  0H
         CLC   QDBWAREA1,QDBWAREA3
         JH    QDBWA1F8_LOOP1_EXIT
         L     R6,12(,R1)
         LTGR  R6,R6
         LA    R5,QDBWAREA_LEN(,R5)  advance to next entry
         BCT   R4,QDBWA1F8_LOOP1  Check next, if any
         LGHI  R5,0
QDBWA1F8_LOOP1_EXIT  DS  0H
         L      R4,12(,R5)   
         LTGR   R4,R4   debugger stops here

Interchangeable use of the base register and index register

It is a common practice to use the base register and index register interchangeably.

In the following example, the debugger reports a null address detection event at the load (LG) instruction. The event is triggered because register 6 contains zero. Even though the sum of the contents of the base register and index register is not zero, the detection event might occur, which causes the debugger to stop the application after the LG instruction.

LGHI  R3,X'1000'
MALOC SIZE=R3
USING  QDBWAREA,R3
XGR    R6,R6
LG     R6,2(R3,R6)