Interprocessor Communications (IPC)

Interprocessor communications (IPC) allows you to move data between loosely coupled processors using the multi-processor interconnect facility (MPIF) and channel-to-channel (CTC) communication links. The MPIF path active exit establishes a MPIF connection across each CTC communication link between processors. The system whose name is first in the alphabetic generally initiates connection processing.

IPC maintains an internal control block structure. The IPC global table (IGT) contains control information and one entry for each processor in a loosely coupled complex. Each entry contains data collection counters and a chain of IPC connection definition blocks (ICDBs) mapped by data macro DCTICD. An ICDB is established for each IPC connection between processors. For example, if 3 CTC links exist between processors A and B, the IGT entry for B in processor A contains a chain of 3 ICDBs. The ICDB contains the connection token, the identify token (IDTOK) for the resident system, and a pointer to the relevant IGT entry. CCCTIN allocates the IPC control block area based on the maximum number of links between loosely coupled processors in keypoint record E (CTKE) and places the address of the IGT in the CINFC table.