Rules
A makefile contains a series of rules that specify targets, dependencies, and recipes. For example, a rule might state that an object file depends on a source file; if you change the source file, you want make to remake the object file using the changed source.
Files that depend on other files are called targets. The files that a target depends on are called prerequisites.
targets [attributes]
ruleop [prerequisites] [; recipe ]
{<tab> recipe}You need to include items enclosed
by [ ]; items within { } can appear zero or more times. In a rule:
- targets
- Represents a list of one or more dependent files.
- attributes
- Represents a list, possibly empty, of attributes to apply to the list of targets. See Using attributes to control updates for more details.
- ruleop
- Represents an operator that separates the target names from the prerequisite names, and optionally affects the processing of the specified targets. All rule operators begin with a colon (:). For more information about rule operators, see Rule operators.
- prerequisites
- Represents a list of filenames on which the specified targets depend.
- recipe
- May follow on the same line as the prerequisites, separated from them by a semicolon. If such a recipe exists, make uses it as the first in a list of recipe lines defining a method for remaking the named targets. Additional recipe lines may follow the first line of the rule. Each such recipe line must begin with a tab character. For more about recipes, see Recipes.
main.o : include.hThis
rule contains a single target, main.o, and a
single prerequisite, include.h. The rule states
that if include.h changes, main.o will
require remaking. A typical makefile does not specify a recipe for
making main.o from main.c;
instead, the default rules provide the recipe using a metarule or
suffix rule. These rules are discussed in Using inference rules.When make parses rules, it treats the targets and prerequisites as tokens separated by white space (one or more blank or tab characters). In addition, make treats the rule operator (ruleop) as a token, but does not require white space around it.
Makefiles can contain special rules that control the behavior of make instead of stating a dependency between targets and prerequisites. For more information about such rules, see Special target directives.