Offsets | Name | Length | Format | Description | |
---|---|---|---|---|---|
0 | 0 | SMF99E_HD_TopoChg_CPU _Index | 2 | binary | Logical CPU/core number. |
2 | 2 | * | 6 | HEX | Reserved. |
8 | 8 | SMF99E_CP_CPU_Array | 8 | binary | CPU/core data. |
8 | 8 | SMF99E_CP_Cpu_Type | 1 | binary | CPU/core type. |
9 | 9 | SMF99E_CP_Misc | 1 | binary | CPU/core miscellaneous
info
|
10 | A | SMF99E_CP_Topo | 2 | binary | CPU/core topology information. |
10 | A | SMF99E_CP_ChipID | 1 | binary | Chip ID. |
11 | B | SMF99E_CP_BookID | 1 | binary | Book ID. |
12 | C | SMF99E_CP_Cap | 4 | binary | CPU/core capacity in microseconds. |
16 | 10 | SMF99E_CP_CI | 8 | binary | CPU/core container information of configuration topology. |
16 | 10 | SMF99E_CP_CI_NlInUse | 1 | binary | Number of highest nesting level in use in array
SMF99E_CP_CI_NL. 0 = there is no container information available in SMF99E_CP_CI_NL. |
17 | 11 | SMF99E_CP_CI_Flags | 1 | binary | Flags:
|
18 | 12 | SMF99E_CP_CI_NL | 6 | binary | CPU container information of the configuration topology per nesting level |
18 | 12 | SMF99E_CP_CI_NL1 | 1 | binary | Container ID of nesting level 1 |
19 | 13 | SMF99E_CP_CI_NL2 | 1 | binary | Container ID of nesting level 2 |
20 | 14 | SMF99E_CP_CI_NL3 | 1 | binary | Container ID of nesting level 3 |
21 | 15 | SMF99E_CP_CI_NL4 | 1 | binary | Container ID of nesting level 4 |
22 | 16 | SMF99E_CP_CI_NL5 | 1 | binary | Container ID of nesting level 5 |
23 | 17 | * | 1 | HEX | Reserved. |