Analyzer entry points
The high-order 2 bytes of register 0 (for module DFSICIO0) identify the analyzer entry points.
Entry points
- Analyzer entry point (hex)
- Processing description
- 1
- Process an input segment from a terminal.
- 2
- Perform a logical read operation to the terminal.
- 3
- Determine which system function is to be performed next for this line and terminal (or node).
- 4
- Issue a GET NEXT call to message queue.
- 5
- Perform a logical write operation to the terminal.
- 6
- WRITE successful; dequeue message or call the device-dependent module at DD1.
- 7
- Notify master terminal of I/O error; cancel input; return output message to queue.
- 8
- Return output message to queue; cancel input.
- 9
- Generate an error message; cancel input; return output message to queue.
- A
- Idle the line; cancel output; return output message to queue.
- B
- Resend the last message sent from a given logical terminal (LTERM).
- C
- Idle the line.
The low-order 2 bytes of register 0 identify the entry points for the device-dependent modules (DDMs), as listed below:
- DDM entry point (hex)
- Processing description
- 1
- WRITE/SEND setup: Set up output buffer to write current buffer.
- 2
- WRITE/SEND interruption: Error check last output operation.
- 3
- READ/RECEIVE setup: Set up to perform a poll or read.
- 4
- READ/RECEIVE interruption: Error check, determine terminal responding, and deblock input segment.
- 5
- Cleanup: Restore control blocks after DFSICI00 error.
- 6
- Build: Move output message from a queue buffer (MFS buffer) to a line buffer.
- 7
- Logon: VTAM® OPNDST/CLSDST processing.
- 8
- Prepare for output: VTAM
- F
- MFS output format control (DFSCOFC0) was entered.