Extended branch mnemonics that incorporate the bo field and a partial bi field
The extended branch mnemonics instruction format when the BO field and BI field are incorporated.
When the BO field and a partial BI field are incorporated, the instruction format is one of the following:
- mnemonic BIF, target_addr
- mnemonic target_addr
where the BIF operand specifies the CR field number (0-7) and the target_addr operand specifies the target address. If CR0 is used, the BIF operand can be omitted.
Based on the bits definition in the CR field, the following set of codes has been defined for the most common combinations of branch conditions:
Branch Code | Meaning |
---|---|
lt | less than * |
eq | equal to * |
gt | greater than * |
so | summary overflow * |
le | less than or equal to * (not greater than) |
ge | greater than or equal to * (not less than) |
ne | not equal to * |
ns | not summary overflow * |
nl | not less than |
ng | not greater than |
z | zero |
nu | not unordered (after floating-point comparison) |
nz | not zero |
un | unordered (after floating-point comparison) |
The assembler supports six encoding values for the BO operand:
- Branch if condition true (BO=12):
where xx specifies a BI operand branch code of lt, gt, eq, so, z, or un.
POWER® family PowerPC® bxx bxx bxxa bxxa bxxl bxxl bxxla bxxla bxxr bxxlr bxxrl bxxlrl bxxc bxxctr bxxcl bxxctrl - Branch if condition false (BO=04):
where xx specifies a BI operand branch code of ge, le, ne, ns, nl, ng, nz, or nu.
POWER® family PowerPC® bxx bxx bxxa bxxa bxxl bxxl bxxla bxxla bxxr bxxlr bxxrl bxxlrl bxxc bxxctr bxxcl bxxctrl - Decrement CTR, then branch if CTR is nonzero and condition is
true (BO=08):
- bdnxx
- Decrement CTR, then branch if CTR is nonzero and condition is
false (BO=00):
- bdnxx
- Decrement CTR, then branch if CTR is zero and condition is true
(BO=10):
- bdzxx
- Decrement CTR, then branch if CTR is zero and condition is false
(BO=02):
- bdzxx