Multiple hardware architecture and implementation platform support

The assembler supports source programs containing instructions unique to any of the Power® and PowerPC® processor architectures.

The following Power and PowerPC processor architectures are supported:

• The first-generation POWER® family processors (POWER family architecture)
• The PowerPC 601 RISC Microprocessor, PowerPC 604 RISC Microprocessor, or the PowerPC A35 RISC Microprocessor (PowerPC architecture)
• POWER5, PowerPC 970, POWER5+, POWER6, POWER7, POWER8, POWER9, and Power10 processor-based servers.

There are several categories of instructions, and one or more categories of instructions are valid on each supported implementation. The various architecture descriptions describe the supported instructions for each implementation. The -M flag can be used to determine which instructions are valid in a particular assembly mode or to determine which assembly modes allow a certain instruction to be used.

The POWER9 processor architecture is described in the Power Instruction Set Architecture Version 3.0 specification. For more information, see the OpenPOWER website.

The Power10 processor architecture is described in the Power Instruction Set Architecture Version 3.1 specification. For more information, see the OpenPOWER website.