Dynamic variable page size support

Processors prior to POWER6® only supported a single page size per segment. The system administrator or user had to choose the optimal page size for a specific application based on its memory footprint.

Selecting 4 KB pages wasted the least amount of memory since only those 4 KB pages actually referenced were used. Larger page sizes could potentially waste a lot of memory (allocated, but never used), depending on the working set locality, and get an appreciable performance boost with fewer virtual to physical translations being needed. Additionally, page sizes greater than 4 KB requires user intervention to explicitly select a specific page size.

POWER6 introduces the concept of mixed page sizes within a single segment. The architecture supports various permutations of the different page sizes; however, POWER6 only supports mixing 4 KB and 64 KB page sizes. AIX® 6.1 takes advantage this new hardware capability to combine the conservative memory usage aspects of the 4 KB page size in sparsely referenced memory regions with the performance benefits of the 64 KB page size in densely referenced memory regions, and it does so automatically without user intervention. This AIX feature is referred to as Dynamic Variable Page Size Support (VPSS). To avoid backward compatibility issues, VPSS is disabled in segments that currently have an explicit page size selected by the user (see Multiple page size application support).

The default setting for a variable page size segment uses 4 KB pages and 4 KB translations in a 64 KB sized and aligned region until all 16 4 KB pages are referenced. Once all 16 pages are referenced, a check is made to make sure they all have the same state (such as same read/write page protection, no-exec protection, storage key protection, and not in I/O state). If they do, then 4 KB translations are removed and replaced with a 64 KB translation.

The 64 KB translations are used as long as all 16 4 KB pages continue to have the same state. If any one of them changes state (for example, through the mprotect subroutine, or LRU stealing one of them. They are then demoted to ordinary 4 KB pages until they recover their uniform state.

Some applications might prefer to use a larger page size, even when a 64 KB region is not fully referenced. The page size promotion aggressiveness factor (PSPA) can be used to reduce the memory referenced requirement at which point a group of 4 KB pages is promoted to a 64 KB page size. The PSPA can be set for the whole system through the vmm_default_pspa vmo tunable or for a specific process through the vm_pattr command.

As with 64 KB page size support, the svmon command has been updated to report variable page size usage.