divd (Divide Double Word) instruction
Divide the contents of a general purpose register by the contents of a general purpose register, storing the result into a general purpose register.
This instruction should only be used on 64-bit PowerPC® processors running a 64-bit application.
|divd||RT, RA, RB (OE=0 Rc=0)|
|divd.||RT, RA, RB (OE=0 Rc=1)|
|divdo||RT, RA, RB (OE=1 Rc=0)|
|divdo.||RT, RA, RB (OE=1 Rc=1)|
The 64-bit dividend is the contents of RA. The 64-bit divisor is the contents of RB. The 64- bit quotient is placed into RT. The remainder is not supplied as a result.
Both the operands and the quotient are interpreted as signed integers. The quotient is the unique signed integer that satisfies the equation-dividend = (quotient * divisor) + r, where 0 <= r < |divisor| if the dividend is non-negative, and -|divisor| < r <=0 if the dividend is negative.
If an attempt is made to perform the divisions 0x8000_0000_0000_0000 / -1 or / 0, the contents of RT are undefined, as are the contents of the LT, GT, and EQ bits of the condition register 0 field (if the record bit (Rc) = 1 (the divd. or divdo. instructions)). In this case, if overflow enable (OE) = 1 then the overflow bit (OV) is set.
The 64-bit signed remainder of dividing (RA) by (RB) can be computed as follows, except in the case that (RA) = -2**63 and (RB) = -1:
|divd||RT,RA,RB||# RT = quotient|
|mulld||RT,RT,RB||# RT = quotient * divisor|
|subf||RT,RT,RA||# RT = remainder|
|RT||Specifies target general-purpose register for the result of the computation.|
|RA||Specifies source general-purpose register for the dividend.|
|RB||Specifies source general-purpose register for the divisor.|
This instruction is defined only for 64-bit implementations. Using it on a 32-bit implementation will cause the system illegal instruction error handler to be invoked.