Cell Broadband Engine Architecture from 20,000 feet

A brief view of CBEA's tripartite organization of storage and its programming implications

From the developerWorks archives

Dr. H. Hofstee

Date archived: December 19, 2016 | First published: August 24, 2005

The Cell Broadband Engine Architecture (CBEA, or, informally, "Cell") defines a new processor structure based upon the 64-bit Power Architecture™ technology, but with unique features directed toward distributed processing and media-rich applications. The Cell architecture defines a single-chip multiprocessor consisting of one or more Power Processor Elements (PPEs) and multiple high-performance SIMD Synergistic Processor Elements (SPEs). While each SPE is an independent processor running its own application programs, a shared, coherent memory and a rich set of DMA commands provide for seamless and efficient communications between all Cell processing elements. This article provides a concise view inside the Cell's architecture.

This content is no longer being updated or maintained. The full article is provided "as is" in a PDF file. Given the rapid evolution of technology, some steps and illustrations may have changed.

Zone=Multicore acceleration
ArticleTitle=Cell Broadband Engine Architecture from 20,000 feet