Inside System Storage -- by Tony Pearson

Tony Pearson Tony Pearson is a Master Inventor and Senior IT Specialist for the IBM System Storage product line at the IBM Executive Briefing Center in Tucson Arizona, and featured contributor to IBM's developerWorks. In 2011, Tony celebrated his 25th year anniversary with IBM Storage on the same day as the IBM's Centennial. He is author of the Inside System Storage series of books. This blog is for the open exchange of ideas relating to storage and storage networking hardware, software and services. You can also follow him on Twitter @az990tony.
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Comments (5)

1 seb_ commented Permalink

I hope this is just a bad one-off of a single overzealous sales rep. How low must someone think of his customers to expect them to swallow that rubbish? The second one saying "Do you think I'm that stupid?" should make him re-think that presentation.

2 TonyPearson commented Permalink

Seb, <br /> We found these charts translated into Portguese language as well, so it appears someone within EMC corporate marketing must be distributing this, and not just the work of a single EMC rep. <br /> -- Tony

3 seb_ commented Permalink

Hmm... soon they'll probably come up with a chart claiming that a VMAX is 37.5% more facemelting-awesome than a DS8000, 4x more kosher, 164% more friendly towards baby kittens and shipped with the ability to make storage admins 3 times more attractive to super models. The sad thing is: there is always someone believing it... sigh...

4 josh_Krischer commented Permalink

Tony, <br /> It is not the first time. <br /> 1. About ten years ago, when HDS introduced the 99xx series EMC created a presentation which was showing that the SYM (at the end of the life) has much better performance. After the presentation, I had the chance to visit the lab and to talk with the team which wrote the benchmark. By analysis of the test, I found that the program defeated any acceleration feature, such as sequential pre-fetching of RAID 5, e.g. <br /> 2. The DMX-3 uses what EMC refers to as “Direct Matrix Architecture” which EMC claims provides for up to 128 GB/s bandwidth, however: <div>&nbsp;</div> The DMX cache is built from 2 to 8 cache modules with capacities between 16 and 512 GBytes. Each Cache module has 8, 1Gbit/s connections to each of the Channel Directors (CD - host front-end interface) and similar connectivity to the 8 Device Directors (DD - back-end interface) which means that only a fully configured DMX has 128x1 GBytes/s bi/directional connections. <div>&nbsp;</div> This doesn’t mean that the maximum cache bandwidth is 128 GBytes/s because the DMX cache supports a maximum of only 32 concurrent operations* (4 concurrent memory transfers per cache module) which only result in a total theoretical 32 GBytes/s for data and control traffic. <div>&nbsp;</div> Each of the 1GB/s serial connections is composed of a pair of full-duplex unidirectional serial links—two 250MB/s serial transfer links (TX), and two 250MB/s serial receive links (RX) which means 0.5 GByte/s in each direction, which, depending on the type of workload may further reduce the practical available bandwidth. <div>&nbsp;</div> There are only 32 bi-directional paths to cache, and only half the bandwidth can be used in any direction at one time. <br /> Considering all the above, the maximum achievable bandwidth of the DMX is below 16 GByte/s, much lower than the 128 GByte/s stated in DMX documentation. <div>&nbsp;</div> A modest DMX configuration with two cache modules, two CDs and two DDs has lower bandwidth. Because the cache directory is stored in the cache and each access to cache requires additional access to fetch the metadata, the effective bandwidth is even lower. <div>&nbsp;</div> So from 128 we reached 8 GB/s with full cache. <br />

5 TonyPearson commented Permalink

Josh, <br /> Thanks for the insight! <br /> -- Tony

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