You may have seen that in a formatted z/VSE system dump. Here is some background:
The breaking-event-address recording can be used as debugging assist to detect a wild branch. This facility is available on newer z Systems processors. It provides a 64 bit breaking-event-address register (BEAR) in the CPU.
Normally, operation of a CPU is controlled by instructions in storage, executed sequentially. The Program Status Word (PSW) includes the instruction address, condition code and other information, used to control the sequence of instructions and the state of a CPU. The instruction address in the PSW is incremented by the length of the executed instruction. Some instruction, such as branch and Load PSW, cause the contents of the PSW instruction address to be replaced, rather than incremented. The action to replace the instruction address is called a break event. The address of such an instruction is placed in the breaking-event-address register.
Each time a program interruption occurs (program check, e.g. operation exception), the contents of the breaking-event-address register is placed in real storage location 272-279 (X'110'-X'117').
In case of a program interruption the program check handler of the z/VSE Supervisor gets control and saves the breaking-event address (X'110'-X'117') into an internal VSE task related z/VSE control block.
If a system dump is taken, the breaking-event-address (see field BEAR) will show up in the formatted dump. If you have a STXIT PC, or ESTAE(X) routine, the breaking-event-address is available in the
corresponding interrupt information of the exit's SDWA (64 bit extension) / STXIT save area (AMODE=ANY64). You may also use the GETFLD macro (FIELD=BREAK) to retrieve the latest breaking-event-address in case of a program interruption for the (current active) VSE task.
More detailed information about Breaking-Event-Address Recording is described in the z/Architecture Principles of Operation. You may download that book from our documentation web page - here.