SpursEngine a "Cell" with the PPE removed: In a Tech On interview with Yoshio Masubuchi, GM of Toshiba's Broadband System LSI Development Center (and part of the Cell/B.E. architecture design team), Masubuchi explains what of the Cell/B.E. design is in the Toshiba SpursEngine and what isn't:
|In the sense that SPEs are incorporated, the SpursEngine certainly inherits Cell's DNA. I, however, think it's not appropriate to call it a direct descendant of the Cell because a PPE CPU core, which performs general processing in the Cell, is removed.|
Compared with the Cell, which operates at nearly 4GHz frequencies, the SpursEngine operates at much lower frequencies assuming the application to digital home appliances. The sample chip operates at 1.5GHz.
To downsize the circuit area in line with the lower operating frequencies, we optimized layout design. As for SPEs in particular, we optimized layout for the SpursEngine and downsized the circuit area by 30 percent.
[Since the Cell/B.E. architecture was designed so that the number of SPEs could be flexibly increased or decreased, was it easier to remove SPEs in the SpursEngine?] Compared with other logical architectures, it is true that removing four SPEs was much easier. It can be said that the Cell design concept worked successfully.
[Why did you choose four SPEs for the the SpursEngine?] Through such experiences [diverse Cell/B.E. application development], we became able to sense how many SPEs we need in order to realize a desired application ... we finally decided the number of SPEs in consideration of the balance between processing capacity and the size of a circuit area that an LSI for digital electronics can afford.
[Do the host-side CPU core (replacement for the PPE) and the SPEs interoperate as smoothly as in the Cell/B.E. processor?] The SpursEngine employs PCI Express for connection with the host side, but processing efficiency will lower if SPEs frequently communicate with the external CPU.