Exploitation support for multi-threading (z13 hardware) in TDSz
MarkShewell 110000PSVV Visits (7960)
APAR PI37191 provides exploitation support for multi-threading, which is introduced with z13 hardware.
Simultaneous Multi-Threading (SMT) is a technique for improving the overall efficiency of CPU resources. When multi-threading is enabled and a unit of work (thread) running on a core encounters a cache miss and can no longer make progress, the core is able to switch to a different thread which is ready to execute.
When multi-threading is enabled, new information is available in the SMF type 70 (CPU activity), SMF type 71 (Paging activity) and SMF type 72 subtype 3 (Workload activity) records.
PI37191 includes the following changes:
3. The existing MVSPM RMF CPU Activity, Hourly Trend/Daily Overview reports (MVSPM116/MVSPM117) are changed to display information for either logical processor usage (when multi-threading is not enabled) or logical core/thread usage(when multi-threading is enabled). This is in line with the information displayed on the RMF Postprocessor CPU Activity report.
4. A new report MVSPM RMF Multi Threading Analysis, Hourly Trend (MVSPM131) is provided. This report displays information similar to the Multi Threading analysis information on the RMF Postprocessor CPU Activity report.
5. Columns are added to the MVSPM_WORKLOAD2_H, KPMZ_WORKLOAD_T, and KPMZ_WORKLOAD_H tables to capture multi-threading maximum capacity factors for CP, zIIP and zAAP processors. These factors are used in view calculations (see next point).