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Next Generation Systems

  

TANSTAAFL="There ain't no such thing as a free lunch" with apologies to Robert Heinlein in "The Moon is a Harsh Mistress"


One noted author quotes this in reference to the end of the free

performance improvement that Moore's Law offers on single chip clock

speed every 18 months.


This heralds performance improvement in future will need to do more

then just sit on your hands waiting for the next clock speedup, but

that you have to program in latent parallelism into your code to take

advantage of more cores as they come out.


This requires a new mind set, in everything.


Hi, my name is Michael Wong and I am IBM's OpenMP and C++ Standard

representative. I and my colleagues will bring through this blog some

of the key industry trends related to Parallel and Multi-Core

Computing. We have been involved through our roles as implementers,

academic liaisons, representatives on various standard committees and

consortiums.


The fact of it is that times have never been better for Parallel &

Multi-Core Computing, with almost every standard, specification,

manufacturer coming out with support for multicores in programming

models, applications, and hardware. Some recent examples are Cell,

OpenMP 3.0, new Java Memory model, UPC and co-array Fortran, C++0x

concurrency, Cilk, transactional memory, auto-parallelization, Altivec and various proprietary or research projects


There is no question that multi-core is a renaissance in systems and

processor design. But it is also a software issue with implications

throughout the entire software development stack.


So come back often and see how this story evolves.