Posted in: IBM Research-Zurich, Nanotechnology, Physics

Meet the IBM Inventor Who Built his First Circuit at 8

National Inventors’ Day is a day to honor inventors and their genius. At the IBM Research Lab in Zurich, the list of inventors is long, but we were able to catch up with one of your newly appointed Master Inventors, Lukas Czornomaz, who talks about his career and some of the patents that were granted along the way.

Lukas Czornomaz and Veeresh Deshpande, taking home the Best Student Paper Award of the IEEE 2016 Syposium on VLSI Technology

Lukas Czornomaz, specializes in semiconductor technology and is the project lead for various research and industrial projects in the field of Advanced CMOS, Photonics and RF/mm-Wave for applications in the context of Internet-of-Things.

He recently received the Best Student Paper Award of the IEEE 2016 Symposium on VLSI Technology as well as the 2017 Compound Semiconductor Industry Innovation Award for demonstrating the first Hybrid Indium gallium arsenide (InGaAs)/ Sillicon-geranium (SiGe) CMOS Circuits on Sillicon(Si) substrate using processes compatible with high-volume manufacturing on 300 mm wafers. He holds up to 35 patents in the fields of CMOS, photonics, non-volatile memories, neuromorphic computing and sensors.

Could you give us a simple explanation of the technology you’re developing?

Lukas Corzornmaz (LC): I’m working on CPUs, the central processing units of computers, which are commonly known as the ‘brain’ of the computer. CPUs consists of billions of transistors that function as switches, and the performance of this `brain’ is directly linked to the number of switches on a unit and how fast they are. Power efficiency is also an important element – it’s an indicator of performance in relation to power consumption. Too much power could melt the chip.

When it comes to size, do smaller transistors perform better?

LC: For decades the strategy for developing the next generation of CPUs was always the same: make the transistors smaller. The smaller they are, the faster and the more you can fit on a chip. Plus, they consume less power. But this approach has changed in the last 10 years because scaling silicon transistors has reached some limits. Smaller silicon transistors don’t necessarily get faster, nor can we improve their power efficiency without compromising the switching speed. So, we’ve had no choice but to think out of the box to build smaller transistors with increased performance and low-power consumption.

Your work aims to break away from using pure silicon to get around the scaling problem.

LC: Yes, that’s correct. Our research team is investigating III-V semiconductors as a replacement for silicon. III-V semiconductors consist of chemical elements from columns III and V of the periodic table. We’ve known for more than 30 years that, in theory, III-V materials have intrinsically better transport properties and that electrons travel at a much higher velocity in III-V materials than in silicon. It would allow a reduction in operating voltage by a factor of two, which corresponds to a power consumption reduction by a factor four without compromising performance.

What have you discovered so far?

LC: After five years of research, we have been able to demonstrate that hybrid integration of the chemical compound Indium gallium arsenide/ Sillicon-geranium (InGaAs/SiGe) is a reliable path forward towards further improving the power/performance ratio for digital technologies beyond the 7nm node. We’ve basically combined three key features in a single technology: selective growth of high quality InGaAs regions on Si, the fabrication of InGaAs and SiGe finFets, and the processing of functional 6T-SRAM cells.

But what does it all mean? Are there any real advantages to this hybrid technology?

LC: We expect this novel technology to enable at least a 25 percent increase in performance at the same power consumption, or a division of power consumption by two at the same performance. In other words, doubling the battery life of, say, a mobile device. Clearly, there’s great potential in co-integrating InGaAs and SiGe MOSFETs for advanced CMOS technology.

How many patents came out of this research project? Is there one that stands out?

LC: Approximately 15 patents were granted during the project, protecting many aspects of the technology that we developed. In my opinion, patent US 9,640,394 is the most significant because it protects our InGaAs integration method by selective epitaxy in empty oxide cavities. This patent indicates a real paradigm shift for the integration of various types of semiconductors on a Si platform.

What’s next?

LC: Although we’ve demonstrated that our hybrid solution works and that it’s scalable, there is still much work to do and many challenge to overcome. The big question is whether the compound materials we are using can uphold their quality in mass production. On this note, we will continue to devote our research to making this technology ready to manufacture. We will also explore other applications for future Internet-of-Things technologies, namely RF communication and  integrated photonic devices with Si CMOS.

Tell us something about yourself that very few people know.

(LC): I built my first electronic circuit at the age of eight, and it took me 20 years to make my own integrated circuit on Si. But, I made it from the first atom, and with one of the most advanced existing technologies!

Lukas Czornomaz and two other IBM Master Inventors talk about what the role means:

 

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Lukas Czornomaz

IBM Scientist and Master Inventor