IBM scientists have been recognized with the 2017 Compound Semiconductor Industry Innovation Award. The recognition is a culmination of five years of research by the Zurich-based IBM team which is focused on using high mobility materials into silicon CMOS technology to scale below 7 nanometers (nm).
Consider the technology chain from mobile devices to the Internet of Things to the cloud and everything in-between. There is a huge tradeoff between power and performance, resulting in reduced battery life and energy challenges. IBM scientists believe they may have the answers, which can be summarized in three words scaling and new materials.
The winning IBM team’s crowning achievement was its first demonstration of an Indium gallium arsenide (InGaAs)/Silicon-germanium (SiGe) CMOS technology on Silicon (Si) substrate using processes suitable for high-volume manufacturing on 300 mm wafers. InGaAs/SiGe hybrid integration is one of the main paths forward to enable the further improvement of the power/performance trade-off metrics for digital technologies beyond the 7 nm node. Based on selective epitaxy their approach yielded functional inverters and dense arrays of 6T-SRAMs the basic blocks of digital CMOS circuits.
Dr. Lukas Czornomaz, one of the lead scientists focused on this research at IBM said, “This novel technology is expected to enable 25 percent better performance with the same power consumption, or to double the battery life of mobile devices while maintaining their performance.”
— IBM Research (@IBMResearch) February 25, 2016
This work – a first-of-a-kind – was disclosed at the last VLSI Technology conference. It concludes a series of key demonstrations for InGaAs/SiGe CMOS reported in multiple contributions and highlights for the last four years at IEDM meetings and VLSI Technology Symposia. Since many years the technological bottleneck is to demonstrate a path that enable simultaneously the growth of high-quality InGaAs crystals, the fabrication of high performance InGaAs field effect transistors “on-insulator” and their co-processing with SiGe devices all on a silicon substrate.
While a few approaches have been proposed, the IBM team’s winning work is the only one that reports basic building blocks of digital circuits at relevant dimensions and achieves a major milestone towards a manufacturable hybrid InGaAs/SiGe CMOS technology. It is based on three key features in a single technology: the selective growth of high quality InGaAs-on-Insulator regions, the fabrication of InGaAs finFETs with physical gate length Lg= 35 nm with good device characteristics, and the processing of functional 6T-SRAM cells with a cell area ≈0.4µm2.
It clearly highlights the potential of the nominated work as the method of choice to co-integrate InGaAs and SiGe MOSFETs for advanced CMOS technology. It also opens the door towards future low cost RF or photonic circuits based on a similar hybrid III-V silicon technologies.
“While there is still much work to be done, we have demonstrated that our design works and that it’s manufacturable,” said Dr. Czornomaz.
It’s no wonder why the team won the coveted prize.
In the future, the team will continue to support the development of this technology towards manufacturing, and explore its application to integrated RF communication and integrated photonic devices with Si CMOS for future Internet-of-Things technologies.