Posted in: IBM Research-Zurich, Materials Science, Microelectronics, Systems

Mapping hot spots at 10nm and below

This is the first of a four-part series about IBM featured papers at IEDM 2016.

The annual International Electron Devices Meeting is “the world’s pre-eminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling.” So IBM researchers brought their scanning probe thermometer, their air spacer for a 10 nanometer chip, their 7 nm chip, and not to be out-done by silicon, they brought their carbon nanotubes, too. These papers and presentations by IBMers and many partners will take part in this week’s conference in San Francisco.

IEDM features four IBM papers as some of the conference’s best examples of this re-imagining of computing — extending Moore’s Law, and building new architectures, and using new materials to go beyond it. Here is a closer look at these papers, and the scientists behind the work, beginning with “Local Thermometry of Self-Heated Nanoscale Devices” by IBM research scientist and post-doc Fabian Menges, co-inventor of the scanning probe thermometer.

As everything scales to the nano, heat – more precisely, the loss of it – becomes an issue in device reliability. So, scientists at IBM’s research lab in Zurich and ETH Zurich invented a technique to measure the temperature of these nano-sized objects. Their scanning probe thermometer can measure temperatures at and below 10 nm. This gives engineers a way to map heat loss across a chip, and, more importantly, map heat loss down to the single device level. So, even within devices we can map temperature distributions.

“Not only is the scanning probe thermometer accurate, it meets the trifecta for tools: it’s easy to operate, simple to build, and versatile, in that it can be used to measure the temperature of nano- and micro-sized hot spots that can locally affect the physical properties of materials or govern chemical reactions in devices such as transistors, memory cells, thermoelectric energy converters or plasmonic structures. The applications are endless,” said Menges when the invention was made public in March.

illustration of one of the team’s experiments with a VO2 phase-change resistor on a TiO2 substrate with Au/Cr contacts, showing self-heating around current filaments.

Illustration of one of the team’s experiments with a VO2 phase-change resistor on a TiO2 substrate with Au/Cr contacts, showing self-heating around current filaments.

Temperature in today’s chips are monitored during operation. If the chip gets too hot, the load can be adjusted. However, this is done on the chip level (on the order of centimeters). The method developed by Menges and team works on a much smaller length scale and can deal with individual devices on a chip. Therefore, it is not a method useful during operation of a chip. Rather it helps in the development of devices. As temperatures rise within and around a device, for example a transistor, it triggers failure mechanisms such as electromigration, and defect creation. The scanning probe thermometer can be used as an analytical tool to quantify the temperature and relate it to observed failure mechanisms.

One of the key issues in further device scaling is the increase of local heat generation and the increasing resistance to heat dissipation, sometimes referred to as a thermal bottleneck. The better the heat generated within devices can be transferred into outside cooling areas, the lower the temperature rise in the device, and the lower the failure rate. Using the scanning probe thermometer can help engineers and scientists understand the relation of device design and heat generation and dissipation mechanisms. This, in turn, will feedback into device design and lead to better performing chips.

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External Communications Lead, IBM Research

Chris Nay

External Communications Lead, IBM Research