The error analysis (SYNAD) routine is given control if the operation is not completed satisfactorily due to an uncorrectable I/O error. The contents of the registers when the error analysis routine is given control are described in z/OS DFSMS Using Data Sets.
If your SYNAD routine is entered, it is entered in the addressing mode in which the PUTX was issued. If you supplied a SYNAD routine which resides above the line in the DCBE, the PUTX must be issued in 31-bit addressing mode. On entry to the SYNAD routine, register 1 contains error flags in byte 0 followed by the DCB address in bytes 1-3. For 31-bit callers, the caller must save the error flags, if needed, and then clear the high order byte of register 1 before using it to access fields within the DCB in the SYNAD routine.