The following format shows the location of the reason code and wait state code in the PSW:

X'000A0000 00000000 00000000 000rrwww'

000A0000

The A is bits 12 through 15 (the CMWP bits).

rr

A hexadecimal reason code indicating the reason for the failure.

www

The wait state code.

The reason code (rr) is one of the following:

10

While IEEVWKUP was processing a CF CPU online request on the target CPU, another RESTART signal was received on the same CPU.

11

A program-check occurred on the new processor prior to the architecture mode being properly set for that processor.

12

A machine-check occurred on the new processor prior to the architecture mode being properly set for that processor.

20

A RESTART was received on the target CPU after IEEVCVSR timed out waiting for DSGNL RESTART to finish.

30

During CPU online processing, IEEVWKUP detected that IEEVCVSR decided to back out of CPU online processing.