IV72134: IPA CHANGING UNSIGNED DIVIDE TO SIGNED DIVIDE

XL C/C++ for AIX Fix Pack 13 (August 2015 Update) for 12.1
XL C/C++ for AIX Fix Pack 14 (December 2015 Update) for 12.1
XL C for AIX Fix Pack 15 (April 2016 Update) for 12.1
XL C/C++ for AIX Fix Pack 15 (April 2016 Update) for 12.1
XL C for AIX Fix Pack 16 (July 2016 Update) for 12.1
XL C/C++ for AIX Fix Pack 16 (July 2016 Update) for 12.1
XL C/C++ for AIX Fix Pack 17 (November 2016 Update) for 12.1
XL C for AIX Fix Pack 17 (November 2016 Update) for 12.1
XL C for AIX Fix Pack 18 (February 2017 Update) for 12.1
XL C/C++ for AIX Fix Pack 18 (February 2017 Update) for 12.1
XL C for AIX Fix Pack 19 (August 2017 Update) for 12.1
XL C/C++ for AIX Fix Pack 19 (August 2017 Update) for 12.1
XL C for AIX Fix Pack 20 (March 2018 Update) for 12.1
XL C/C++ for AIX Fix Pack 20 (March 2018 Update) for 12.1
XL C for AIX Fix Pack 13 (August 2015 Update) for 12.1
XL C for AIX Fix Pack 14 (December 2015 Update) for 12.1
XL C/C++ for AIX Fix Pack 21 (January 2019 Update) for 12.1
XL C for AIX Fix Pack 21 (January 2019 Update) for 12.1

APAR status

• Closed as program error.

Error description

• For certain scenarios, the compiler generates incorrect divide
  instructions when compiling with -qipa=level=0.
  
  An incorrect listing scenario could be similar to the following:
  Area of concern (sradi + addze ==> signed divide ==> bad):
     35| 0000C4 cmpldi   28250000   1     CL8       cr0=gr5,0
     35| 0000C8 bc       4081013C   1     BF
  CL.44,cr0,0x10/lgt,taken=20%(20,80)
      0| 0000CC addis    3C00AAAA   1     LIU       gr0=43690
     35| 0000D0 addi     38A5FFFF   1     AI        gr5=gr5,-1
      0| 0000D4 addis    3CE0CCCC   1     LIU       gr7=52428
     35| 0000D8 sradi    7CA90E74   1     SRA8CA    gr9,ca=gr5,1
      0| 0000DC addis    3D00F0F0   1     LIU       gr8=61680
      0| 0000E0 ori      6000AAAA   1     OIL       gr0=gr0,0xAAAA
      0| 0000E4 addis    3CA0FF00   1     LIU       gr5=65280
     35| 0000E8 addze    7D290194   1     ADDE
  gr9,ca=gr9,0,ca
      0| 0000EC ori      60E7CCCC   1     OIL       gr7=gr7,0xCCCC
     35| 0000F0 addi     39690001   1     AI        gr11=gr9,1
      0| 0000F4 ori      6108F0F0   1     OIL       gr8=gr8,0xF0F0
      0| 0000F8 ori      60A9FF00   1     OIL       gr9=gr5,0xFF00
      0| 0000FC addis    3D40FFFF   1     LIU       gr10=65535
     35| 000100 addi     38A00000   1     LI        gr5=0
      8| 000104 addi     3884FFF8   1     AI        gr4=gr4,-8
      0| 000108 mtspr    7D6903A6   1     LCTR      ctr=gr11
  
  
  The correct sequence should be:
  rdicl for unsigned divide ==> good
  

Local fix

• N/A
  

Problem summary

• USERS AFFECTED:
  Users with larger iteration count loops may be affected by this
  issue.
  
  PROBLEM DESCRIPTION:
  The compiler backend optimizer was incorrectly converting an
  unsigned divide into a signed divide during loop normalization.
  

Problem conclusion

• The compiler has been fixed to resolve the above issue.
  

Temporary fix

Comments

APAR Information

• APAR is sysrouted FROM one or more of the following:

• APAR is sysrouted TO one or more of the following:

  IV75527

Fix information

• Fixed component name

  XL C FOR AIX

• Fixed component ID

  5725C7100

Applicable component levels