VM65918: NEW FUNCTION : VSWITCH LINK AGGREGATION ENHANCEMENTS

Obtain the fix for this APAR.

APAR status

• Closed as new function.

Error description

• Improve load balancing and packet transmission serialization.
  

Local fix

Problem summary

• ****************************************************************
  * USERS AFFECTED: All users of VSwitch networks                *
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  * PROBLEM DESCRIPTION:                                         *
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  * RECOMMENDATION: APPLY PTF                                    *
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  With the PTF for APAR VM65918, z/VM support for exclusive and
  Multi-VSwitch Link Aggregation configurations is enhanced to
  improve load balancing to leverage both horizontal and vertical
  growth in single and cross virtual switch
  networking configurations.
  

Problem conclusion

Temporary fix

Comments

• Load Balance Enhancements
  
  Two new port group management options are now available
  to balance the work load for a link aggregated port group
  (LAG) configured to a z/VM VSwitch. For a Multi-VSwitch LAG
  configuration, a system administrator has the option to use
  either existing Independent Port Group Management
  or a new type called Collaborative Port Group Management.
  
  Independent Port Group Management allows each VSwitch sharing
  the same port group to independently manage their own work load
  across all the OSA-Express features within the port group.
  Prior to this new support, this is the method used for either
  an exclusive or a shared port group. With this APAR, a
  Multi-VSwitch LAG can use a new type of load balance called
  Collaborative Load Balance Management.
  
  With Collaborative Port Group Management, only a single VSwitch
  sharing the same port group will be tasked with balancing
  the work load across all the OSA-Express features.
  The coordination and management of the shared port group
  is handled by new communications via the IVL Network.
  This method of management now takes into consideration
  the overall usage of the port group rather than the view of a
  single VSwitch when balancing the work load.
  
  With either independent or collaborative management,
  load balance efficiency is increased for port groups containing
  greater than three OSA-Express features.
  Prior to this APAR, a load balance interval only considered
  moving work load from a single pair of ports. Basically,
  moving work load from the most to the least utilized
  OSA-Express feature. With this APAR z/VM will no longer stop
  attempting to move work load on additional ports within
  the group, assuming they would be handled by the next load
  balance interval. After moving work load on the first pair
  of devices, the new logic will then select the next most
  and least utilized ports and perform the load balance
  operation. This is then repeated for all the remaining
  OSA-Express features in the port group.
  
  VSwitch Packet Transmission Enhancement
  
  Main line data transmission serialization changes have been
  made to the VSwitch logic when sending and receiving
  a packet from one port to another. This includes
  communications between a simulated port to another simulated
  port or more importantly between a simulated and a real
  port (UpLink or Bridge Port). Prior serialization only
  permitted a data transmission to occur from a given port in one
  direction at any point in time. The new serialization provided
  by this APAR will now allow data to flow concurrently
  in both directions when there are enough processors available.
  
  Refer to z/VM Connectivity Version 6 Release 4 (SC24-6174-09)
  for more information.
  
  The following additional publications have been updated for this
  support:
      GC24-6193-16: General Information
      SC24-6175-12: CP Commands and Utilities Reference
      SC24-6178-13: CP Planning and Administration
      SC24-6179-12: CP Programming Services
      GC24-6177-11: CP Messages and Codes
      SC24-6208-10: Performance
      GC24-6201-13: Migration
  

APAR Information

• APAR is sysrouted FROM one or more of the following:

• APAR is sysrouted TO one or more of the following:

  UM35252 UM35253

Modules/Macros

• CPLOAD   HCPCBI   HCPCSIBK HCPCVV   HCPGPGBK HCPHVD   HCPIQD
  HCPIQE   HCPIQQ   HCPIQR   HCPIVA   HCPIVC   HCPIVD   HCPIVF
  HCPIVG   HCPIVH   HCPIVL   HCPIVLBK HCPIVS   HCPLAN   HCPLANBK
  HCPMDLAT HCPMES   HCPMESA  HCPMESB  HCPMFN   HCPMLM   HCPMLT
  HCPMNO   HCPMVN   HCPMXD   HCPMXRBK HCPNIDBK HCPRLG   HCPRLOBK
  HCPSCFBK HCPSWA   HCPSWB   HCPSWD   HCPSWK   HCPSWL   HCPSWP
  HCPSWPBK HCPSWS   HCPSWY   HCPSXL   HCPSYN   HCPUCP   HCPVLC
  HCPVLF   HCPVLQ   HCPVLS   HCPVLU   HCPVNS   HCPVQT   HCPVQU
  HCP1935E HCP3199E HCP3223E HCP3225E MRIODVSW MRVNDSES PORT
  VMLAN    VSWITCH
  

Fix information

• Fixed component name

  VM CP

• Fixed component ID

  568411202

Applicable component levels

• RA64 PSY UM34768

     UP18/12/14 P 1802  

• R640 PSY UM35253

     UP17/12/11 P 1802  

Fix is available

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