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<title>IBM developerWorks : Multicore acceleration</title>
<link>http://www.ibm.com/developerworks/</link>
<description>The latest content from IBM developerWorks</description>
<pubDate>25 Nov 2009 05:53:18 +0000</pubDate>
<language>en</language>
<copyright>Copyright 2004 IBM Corporation.</copyright>
<image>
<title>developerWorks</title>
<url>http://www.ibm.com/developerworks/i/dwlogo-small.gif</url>
<link>http://www.ibm.com/developerworks/</link>
</image>

	<item>
		<title><![CDATA[IBM PowerPC 405 Evaluation Kit with CoreConnect SystemC TLMs]]></title> 
		<description><![CDATA[The PowerPC Evaluation Kit is no longer available from
            developerWorks.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/pek/index.html?ca=drs-]]></link> 
		<pubDate>29 Jul 2009 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Automating deployment and activation of virtual appliances for IBM AIX and Power Systems]]></title> 
		<description><![CDATA[Server virtualization enables you to rapidly provision new environments by
      using libraries of virtual image templates, or virtual appliances.  Automated
      provisioning requires the management of operating system, network, and
      application-specific customization. This article provides a sample framework for
      automating virtual image deployment and activation on Power Systems, with a
      downloadable example that demonstrates how to provision a virtual appliance made up
      of IBM WebSphere Application Server V7.0 running on AIX V5.3.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/websphere/library/techarticles/0904_ja/0904_ja.html?ca=drs-]]></link> 
		<pubDate>29 Apr 2009 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[developerWorks Multicore acceleration zone changes]]></title> 
		<description><![CDATA[The Multicore acceleration zone on developerWorks is no longer
            publishing weekly content.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-goodbye/index.html?ca=drs-]]></link> 
		<pubDate>13 Mar 2009 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[A close-up of SDK 3.1, Part 2: Building examples with make.footer]]></title> 
		<description><![CDATA[The Cell/B.E. SDK 3.1 supports a pseudo &quot;build environment&quot; by including
            a make.footer file that you can include in a makefile to help you build
            examples and demonstrations. In this article, you can read about some of the
            features and functions available in the make.footer file and how they are used
            to construct the SDK examples.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-sdkcloseup2/index.html?ca=drs-]]></link> 
		<pubDate>25 Nov 2008 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Debugging common DMA errors]]></title> 
		<description><![CDATA[To access main storage, Cell Broadband Engine(TM) SPEs use direct memory
            access commands (DMA), which transfer data between the main storage and their
            private local memory. Although this organization of distributed storage
            promotes high performance, it requires the SPE programmer to explicitly handle
            the DMA transfers between main and local storage. Errors during these
            transfers can be difficult to detect and debug. This article 
            provides techniques for handling common problems with SPE-initiated DMA
            transfers.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-dmadebug/index.html?ca=drs-]]></link> 
		<pubDate>04 Nov 2008 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell Broadband Engine resource center]]></title> 
		<description><![CDATA[The Cell Broadband Engine (Cell/B.E.) is a new
                            architecture that extends the 64-bit Power Architecture.
                            Ideal for compute-intensive tasks like gaming, multimedia, and
                            physics- or life-sciences and related workloads, the Cell/B.E.
                            is a single-chip multiprocessor no bigger than a
                            fingernail.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/cell/index.html?ca=drs-]]></link> 
		<pubDate>27 Oct 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Programmability, Part 1: Exploring different approaches to programming for Cell/B.E. platforms]]></title> 
		<description><![CDATA[The programming flexibility available for the Cell Broadband Engine(TM) is a
            hot topic in the multicore community. This article discusses leveraging your existing
            skills to program for Cell/B.E.(TM), offers three programming approaches for Cell/B.E.
            systems, and introduces the various tools, software, and hardware available
            for the platform.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-sdkprog1/index.html?ca=drs-]]></link> 
		<pubDate>14 Oct 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[TechReview, Part 2: Program applications with the LAPACK library]]></title> 
		<description><![CDATA[For application programmers using the IBM Software Development
            Kit for Multicore Acceleration (SDK), this article explains how to program
            with the IBM Linear Algebra Package (LAPACK) library using a sample application
            designed to get an inverse matrix. The article also offers 4 pieces of advice on optimizing
            LAPACK programs, and it outlines the package&apos;s optimized APIs. LAPACK is based
            on a published standard interface for commonly used linear algebra
            operations in high-performance computing and other scientific domains.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-trlapack2/index.html?ca=drs-]]></link> 
		<pubDate>30 Sep 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Enabling applications, Part 1: Is your application ready for Cell/B.E.?]]></title> 
		<description><![CDATA[Learn from the experts how to evaluate your application&apos;s
            appropriateness for the Cell/B.E.(TM) platform from the standpoints of
            performance and power needs, the opportunities that exist for parallelism,
            whether the algorithms line up nicely, and whether your application has access
            to a Cell/B.E.-enabled library. This article is Part 1 of a 3-part series from
            the IBM Redbook(R) &quot;Programming the Cell Broadband Engine: Examples and Best
            Practices.&quot; [09/10/08 update:  Made various changes based on updates since the
            IBM Redbook was published.--Ed.]]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-shouldi1/index.html?ca=drs-]]></link> 
		<pubDate>10 Sep 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Page has permanently moved...]]></title> 
		<description><![CDATA[This page has moved permanently.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/systemc/index.html?ca=drs-]]></link> 
		<pubDate>09 Sep 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[TechReview, Part 1: Discover the LAPACK library]]></title> 
		<description><![CDATA[For application programmers using the IBM Software Development
            Kit for Multicore Acceleration (SDK), this article explains the basic
            structure of the IBM Linear Algebra Package (LAPACK) library. The LAPACK is based on a
            published standard interface for commonly used linear algebra operations in
            high performance computing and other scientific domains.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-trlapack1/index.html?ca=drs-]]></link> 
		<pubDate>02 Sep 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[A close-up on SDK 3.0, Part 1: Rebuilding code from src.rpm]]></title> 
		<description><![CDATA[The Cell/B.E. SDK 3.0 includes several src.rpm packages that contain the
            source code for some of the SDK libraries. This article describes
            the steps needed to install the src.rpm, unpack the source into a
            directory where it can be viewed and changed, and rebuild a new rpm.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-sdkcloseup1/index.html?ca=drs-]]></link> 
		<pubDate>26 Aug 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Core partners, Part 5: Increasing SPU performance with instruction scheduling]]></title> 
		<description><![CDATA[The collection of processors in a Cell Broadband Engine(TM) (Cell/B.E.) processor
            displays a DSP-like architecture. This means that the order in which the SPUs
            execute the instructions can have a significant effect on performance. Without a good scheduling
            mechanism in place, data dependencies can stall processor performance. In
            this article, learn from a Cmpware expert how and why to use the Cmpware
            CMP-DK Cell/B.E. SPU Scheduling Tool, which permits fast and easy analysis
            of SPU code in an intuitive, graphical format.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-cmpware1/index.html?ca=drs-]]></link> 
		<pubDate>19 Aug 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Fun with DaCS, Part 1: Using an error handler]]></title> 
		<description><![CDATA[In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to create and
            register a user error handler for use with the Data Communication and
            Synchronization library (DaCS). The &quot;Data Communication and Synchronization Library for 
            Cell Broadband Engine Programmer’s Guide and API Reference, Version 3.0&quot; (see Resources) is the source for the content.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-funwdacs1/index.html?ca=drs-]]></link> 
		<pubDate>05 Aug 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Complex networking using Linux on Power blades]]></title> 
		<description><![CDATA[Blades are an excellent choice for many applications and services,
            especially in the telecommunications service provider industry. But the unique
            requirements of these provider networks often require configurations that are
            complex and need up-front focus and planning so all the stringent functional
            requirements are met. In this article, learn how to plan and set up the
            necessary network configurations for a POWER6 JS22 blade deployment.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/l-bladenetconf/index.html?ca=drs-]]></link> 
		<pubDate>05 Aug 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The little broadband engine that could: More on rendering fractals on the SPE]]></title> 
		<description><![CDATA[In the previous article in the series, you learned about the challenges
            of rendering fractals on the SPE.  That article focused on the SPEs copying their rendering results directly into the
            target data buffer. This article shows you how the fractal generator can be
            optimized further by taking advantage of the SPE&apos;s fondness for vector
            operations.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tacklecell10/index.html?ca=drs-]]></link> 
		<pubDate>29 Jul 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Fun with ALF, Part 6: Using task dependency]]></title> 
		<description><![CDATA[In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the
      Accelerated Library Framework (ALF) task dependency in a two-stage pipeline
            application. The &quot;ALF for Cell/B.E.
      Programmer&apos;s Guide and API Reference, Version 3.0&quot; (see Resources) is the source for the content.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-funwalf6/index.html?ca=drs-]]></link> 
		<pubDate>22 Jul 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E. SDK: Code sample directory]]></title> 
		<description><![CDATA[In this article, you&apos;ll find tables indicating the locations of code
                samples that illustrate how to use the IBM SDK for Multicore Acceleration.
                This article will be updated with new code samples.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-sdkexamples/index.html?ca=drs-]]></link> 
		<pubDate>15 Jul 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[BladeCenter QS: Maximizing memory performance]]></title> 
		<description><![CDATA[This article compares the CBEA processor memory access
            model (with a focus on the IBM BladeCenter(R) QS21 and QS22) with that of general
            purpose processors, providing programmer guidelines to ensure that
            applications can be developed for maximum memory performance. This article also
            describes how to use the Cell Performance Counter tool when
            monitoring memory access activities for tuning and debugging memory
            performance.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-qsmemperf/index.html?ca=drs-]]></link> 
		<pubDate>01 Jul 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Core partners, Part 4: Managing the PlayStation 3 Wi-Fi network]]></title> 
		<description><![CDATA[Terra Soft Solutions IT Manager Aaron Johnson shows you, step-by-step, how to configure and encrypt the built-in Wi-Fi network that comes with the
      Cell Broadband Engine(TM)-based Sony PlayStation 3. And, as a little bonus, get 16 quick
      steps that explain how to switch from a wireless network back to a wired network on the PS3.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-ps3network/index.html?ca=drs-]]></link> 
		<pubDate>17 Jun 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The little broadband engine that could: Rendering fractals on the SPE]]></title> 
		<description><![CDATA[In the previous article in the series, you learned some reasons why there
      were no appreciable performance gains when you migrated the
      fractal-rendering program from running on one SPE to running on multiple SPEs. This
      article is going to illuminate the
      challenge of rendering fractals on the SPE. The focus is on the SPEs copying their
      rendering results directly into the target data buffer.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tacklecell9/index.html?ca=drs-]]></link> 
		<pubDate>10 Jun 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Fun with ALF, Part 5: Using overlapped I/O buffers to add matrices]]></title> 
		<description><![CDATA[In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the
      Accelerated Library Framework (ALF) overlapped input-output buffers to perform
      matrix addition. The &quot;ALF for Cell/B.E.
      Programmer&apos;s Guide and API Reference, Version 3.0&quot; (see Resources) is the source for the content.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-funwalf5/index.html?ca=drs-]]></link> 
		<pubDate>03 Jun 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The little broadband engine that could: Looking at some DaCS performance fine-tuning issues]]></title> 
		<description><![CDATA[In the previous article in the series, you migrated a fractal-rendering program from earlier in the
      series to run using the DaCS data library with no appreciable performance gains when
      going from running on one SPE to running on multiple SPEs. This article explores ways to optimize
      performance.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tacklecell8/index.html?ca=drs-]]></link> 
		<pubDate>20 May 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Fun with ALF, Part 4: Determining the dot product of large vectors]]></title> 
		<description><![CDATA[In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the
      Accelerated Library Framework (ALF) bundled work block distribution and
      the task context to manage situations in which the work block cannot hold the
      partitioned data because of a local memory size limit. The &quot;ALF for Cell/B.E.
      Programmer&apos;s Guide and API Reference, Version 3.0&quot; (see Resources) is the source for the content.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-funwalf4/index.html?ca=drs-]]></link> 
		<pubDate>09 May 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[IBM BladeCenter QS21 hardware performance glossary]]></title> 
		<description><![CDATA[Although there is extensive published data about the hardware performance
      features of a single Cell Broadband Engine(TM) (Cell/B.E.) processor (and about the performance of a
      multitude of applications ported to it), there is little on the specific hardware
      performance features of the IBM BladeCenter(R) QS21 using a coherent SMP node of two
      Cell/B.E processors as well as an elaborate IO subsystem. This glossary goes with
      the article &quot;Evaluating IBM BladeCenter QS21 hardware performance.&quot;
      In that article, the
      authors close the performance gap by providing information about basic latencies, throughputs,
      and relative execution times for some key computational benchmark kernels, such as
      Linpack and SPEC2000. The article also delivers a basic architectural overview of
      the system. And, you can get tips on how to optimize application
      performance.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-qs21perfGlossary.html?ca=drs-]]></link> 
		<pubDate>06 May 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Evaluating IBM BladeCenter QS21 hardware performance]]></title> 
		<description><![CDATA[Although there is extensive published data about the hardware performance
      features of a single Cell Broadband Engine(TM) (Cell/B.E.) processor (and about the performance of a
      multitude of applications ported to it), there is little on the specific hardware
      performance features of the IBM BladeCenter(R) QS21 using a coherent SMP node of two
      Cell/B.E processors as well as an elaborate IO subsystem. In this article, the
      authors close that gap by providing information about basic latencies, throughputs,
      and relative execution times for some key computational benchmark kernels, such as
      Linpack and SPEC2000. The article also delivers a basic architectural overview of
      the system. And, you can get tips on how to optimize application
      performance.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-qs21perf/index.html?ca=drs-]]></link> 
		<pubDate>06 May 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Fun with ALF, Part 3: Finding minimum and maximum values]]></title> 
		<description><![CDATA[In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the
      Accelerated Library Framework (ALF) task context to keep the partial computing
      results for each task instance and then combine them. The &quot;ALF for Cell/B.E.
      Programmer&apos;s Guide and API Reference, Version 3.0&quot; (see Resources) is the source for the content.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-funwalf3/index.html?ca=drs-]]></link> 
		<pubDate>29 Apr 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The little broadband engine that could: DaCS--flexible and complex]]></title> 
		<description><![CDATA[In an earlier article in this series, the author introduced a fractal-generation
      program built around the IDL interface that showcased the strength of IDL&apos;s 
      straightforward API. Executing the program was almost like calling a function and
      getting results. In this article (and using the same basic program), the author 
      demonstrates the Data Communication and Synchronization library&apos;s (DaCS) greater
      flexibility and the tradeoff:  additional complexity. With DaCS, it&apos;s possible to pass the fractal pattern in as an initial argument,
        then use buffers to pass data back and forth as they are processed. While this requires
        more design work, but it might actually be more efficient. This article also shows that DaCS allows
      for much more carefully tuned inputs and outputs.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tacklecell7/index.html?ca=drs-]]></link> 
		<pubDate>22 Apr 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E. SDK 3.0 tools, Part 1: Using performance tools]]></title> 
		<description><![CDATA[This introductory tutorial, designed as a companion for the IBM SDK for
      Multicore Acceleration, Version 3.0 (otherwise known as the Cell Broadband
      Engine(R) SDK), teaches you how to use five performance tools that reside in the SDK
      3.0:  OProfile, Cell Performance Counter, Performance Debugging Tool, the PDT Trace
      Reader, and FDPR-Pro. The Visual Performance Analyzer, available separately, is also highlighted.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/edu/pa-dw-pa-sdk3tool.html?ca=drs-]]></link> 
		<pubDate>15 Apr 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Core partners, Part 3: Transforming Gedae-built portable apps]]></title> 
		<description><![CDATA[This concise study examines the portability of
      applications developed in Gedae by analyzing the work required to move an example
      application from a simulation on a PC to actually running on a DSP board (the
      Mercury Computer System AdapDev system) to running on a multicore Cell Broadband
      Engine(TM) (Cell/B.E.). The article illustrates how architecture considerations were taken into account
      when porting the application to each system. You can see the amount of work required to
      port the application and the performance of the application on each system.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-gedaeport/index.html?ca=drs-]]></link> 
		<pubDate>08 Apr 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Linux development on the PlayStation 3, Part 3: Slimming down X11 with tiny tools]]></title> 
		<description><![CDATA[The Sony PlayStation 3 (PS3) runs Linux, but getting it to run well requires
      some tweaking. In the third and final article of this series on PS3 Linux, Peter
      Seebach talks about ways to get X11 slimmed down to fit on a smaller memory budget.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/l-linux-ps3-3/index.html?ca=drs-]]></link> 
		<pubDate>08 Apr 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Linux development on the PlayStation 3, Part 2: Working with memory]]></title> 
		<description><![CDATA[The Sony PlayStation 3 (PS3) runs Linux, but getting it to run well requires
      some tweaking. In this article, the second in a series, Peter Seebach takes a look
      at where all the memory goes and how to reclaim it.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/l-linux-ps3-2/index.html?ca=drs-]]></link> 
		<pubDate>31 Mar 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Fun with ALF, Part 2: Converting I/O data]]></title> 
		<description><![CDATA[In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the
      Accelerated Library Framework (ALF) task context buffer as a large lookup table to
      convert the 16-bit input data to 8-bit output data. The &quot;ALF for Cell/B.E.
      Programmer&apos;s Guide and API Reference, Version 3.0&quot; (see Resources) is the source for the content.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-funwalf2/index.html?ca=drs-]]></link> 
		<pubDate>25 Mar 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Fun with ALF, Part 1: Adding large matrices together]]></title> 
		<description><![CDATA[In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the
      Accelerated Library Framework (ALF) in the IBM SDK for Multicore Acceleration 3.0 to
      add two large matrices together. There is one example for host data
      partitioning and one for accelerator data partitioning. The &quot;ALF for Cell/B.E.
      Programmer&apos;s Guide and API Reference, Version 3.0&quot; (see Resources) is the source for the content.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-funwalf1/index.html?ca=drs-]]></link> 
		<pubDate>18 Mar 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Linux development on the PlayStation 3, Part 1: More than a toy]]></title> 
		<description><![CDATA[The Sony PlayStation 3 (PS3) runs Linux, but getting it to run well requires
      some tweaking. In this article, first in a series, Peter Seebach introduces the
      features and benefits of PS3 Linux, and explains some of the issues that might
      benefit from a bit of tweaking.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/l-linux-ps3-1/index.html?ca=drs-]]></link> 
		<pubDate>18 Mar 2008 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The little broadband engine that could: IDL is dead--long live DaCS!]]></title> 
		<description><![CDATA[In SDK 3.0, the Data Communication and Synchronization library (DaCS)
      provides a sparkling substitute for IDL. DaCS is a set of services to aid the development
      of applications and application frameworks in a heterogeneous multi-tiered system.
      This article takes you on a tour of the DaCS process model and
      explores general DaCS principles, including communication and memory access.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tacklecell6/index.html?ca=drs-]]></link> 
		<pubDate>04 Mar 2008 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The little broadband engine that could: Reviewing the newest little SDK that installs natively on PS3]]></title> 
		<description><![CDATA[Come along on a little train tour of the SDK for Multicore Acceleration 3.0
      to see what&apos;s different for developers and how you can make good use of the SDK,
      including native installation on PS3, support for FC7 and RHEL 5.1, enhanced compilers,
      Fortran and Ada support, BLAS, ALF, and DaCS--oh my!]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tacklecell5/index.html?ca=drs-]]></link> 
		<pubDate>19 Feb 2008 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[New to Cell/B.E., multicore, and Power Architecture technology]]></title> 
		<description><![CDATA[The Multicore acceleration technology zone on developerWorks contains
            articles, tutorials, and tips to help developers with Cell Broadband
            Engine(TM), multicore, and Power Architecture(TM) application development,
            optimization, and migration. For users trying to find their way in a new
            topic, all of that information can be overwhelming. This page provides an
            overview for readers who would like to learn about this technology but don&apos;t
            know where to start.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/newto/index.html?ca=drs-]]></link> 
		<pubDate>12 Feb 2008 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Core partners, Part 2: Using DDT to clean up Cell/B.E. app bugs]]></title> 
		<description><![CDATA[Allinea Software&apos;s Distributed Debugging Tool (DDT)
      provides an easy-to-use, capable debugger that is able to debug complete Cell
      Broadband Engine applications, including multiple threads within a single Cell/B.E.
      processor and clusters of Cell/B.E. processors.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-ddtdebug/index.html?ca=drs-]]></link> 
		<pubDate>05 Feb 2008 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E. container virtualization, Part 2: Implementation issues]]></title> 
		<description><![CDATA[This three-part series illustrates a
      hardware-resource-focused form of software virtualization known as container
      virtualization (or operating system virtualization), demonstrated through the open
      source project OpenVZ. The series provides a comprehensive overview of all the
      components and techniques needed to virtualize the Cell/B.E. processor with software
      methods. This second article of the series details the implementation of
      dedicated virtualization and partitioning that was described in Part 1 of the series.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-virtual2/index.html?ca=drs-]]></link> 
		<pubDate>08 Jan 2008 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E. container virtualization, Part 1: Concepts, architectures, and tools]]></title> 
		<description><![CDATA[This three-part series illustrates a
      hardware-resource-focused form of software virtualization known as container
      virtualization (or operating system virtualization), demonstrated through the open
      source project OpenVZ. The series provides a comprehensive overview of all the
      components and techniques needed to virtualize the Cell/B.E. processor with software
      methods. This first article of the series discusses the basic concepts
      involved, illustrates the salient points of the OpenVZ and Cell/B.E. architectures
      and how they work together, and describes some of the OpenVZ tools.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-virtual1/index.html?ca=drs-]]></link> 
		<pubDate>11 Dec 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E. SDK 3.0, Part 1: Create an SPU project]]></title> 
		<description><![CDATA[This introductory tutorial, designed for the IBM SDK for Multicore
      Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK),
      explores the Cell/B.E. processor IDE and gives developers a click-for-click
      walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU
      project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application
      launcher, debugging and doing performance analysis, using simulator consoles,
      using the ALF wizard, and setting IDE preferences.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/edu/pa-dw-pa-cellide30-1.html?ca=drs-]]></link> 
		<pubDate>13 Nov 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E. SDK 3.0, Part 6: Use simulator consoles, use the ALF wizard, and set IDE preferences]]></title> 
		<description><![CDATA[This introductory tutorial, designed for the IBM SDK for Multicore
      Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK),
      explores the Cell/B.E. processor IDE and gives developers a click-for-click
      walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU
      project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application
      launcher, debugging and doing performance analysis, using simulator consoles,
      using the ALF wizard, and setting IDE preferences.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/edu/pa-dw-pa-cellide30-6.html?ca=drs-]]></link> 
		<pubDate>13 Nov 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E. SDK 3.0, Part 5: Debug and complete dynamic or static performance]]></title> 
		<description><![CDATA[This introductory tutorial, designed for the IBM SDK for Multicore
      Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK),
      explores the Cell/B.E. processor IDE and gives developers a click-for-click
      walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU
      project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application
      launcher, debugging and doing performance analysis, using simulator consoles,
      using the ALF wizard, and setting IDE preferences.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/edu/pa-dw-pa-cellide30-5.html?ca=drs-]]></link> 
		<pubDate>13 Nov 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E. SDK 3.0, Part 4: Configure the application launcher]]></title> 
		<description><![CDATA[This introductory tutorial, designed for the IBM SDK for Multicore
      Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK),
      explores the Cell/B.E. processor IDE and gives developers a click-for-click
      walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU
      project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application
      launcher, debugging and doing performance analysis, using simulator consoles,
      using the ALF wizard, and setting IDE preferences.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/edu/pa-dw-pa-cellide30-4.html?ca=drs-]]></link> 
		<pubDate>13 Nov 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E. SDK 3.0, Part 3: Create the Cell/B.E. simulator environment]]></title> 
		<description><![CDATA[This introductory tutorial, designed for the IBM SDK for Multicore
      Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK),
      explores the Cell/B.E. processor IDE and gives developers a click-for-click
      walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU
      project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application
      launcher, debugging and doing performance analysis, using simulator consoles,
      using the ALF wizard, and setting IDE preferences.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/edu/pa-dw-pa-cellide30-3.html?ca=drs-]]></link> 
		<pubDate>13 Nov 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E. SDK 3.0, Part 2: Create a PPU project]]></title> 
		<description><![CDATA[This introductory tutorial, designed for the IBM SDK for Multicore
      Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK),
      explores the Cell/B.E. processor IDE and gives developers a click-for-click
      walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU
      project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application
      launcher, debugging and doing performance analysis, using simulator consoles,
      using the ALF wizard, and setting IDE preferences.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/edu/pa-dw-pa-cellide30-2.html?ca=drs-]]></link> 
		<pubDate>13 Nov 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Porting workshop, Part 7: Getting the most performance]]></title> 
		<description><![CDATA[The seven quick-read parts of this &quot;Porting workshop&quot; series take
      you on a real-world trip from strategy and planning through workload execution,
      performance tweaking, optimization, and a solid conclusion. The series describes how to
      most effectively port compute-intensive applications to the Cell Broadband Engine
      platform. In part seven, the authors evaluate the performance data to date.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-cellport7/index.html?ca=drs-]]></link> 
		<pubDate>06 Nov 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E.
SDK: Understanding the terminology]]></title> 
		<description><![CDATA[A quick-reference glossary of terms you might encounter when installing and
    using the Cell Broadband Engine (Cell/B.E.) processor
    SDK.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-cellglossary/index.html?ca=drs-]]></link> 
		<pubDate>19 Oct 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Porting workshop, Part 6: Tying it all together]]></title> 
		<description><![CDATA[The seven quick-read parts of this &quot;Porting workshop&quot; series take
      you on a real-world trip from strategy and planning through workload execution,
      performance tweaking, optimization, and a solid conclusion. The series describes how to
      most effectively port compute-intensive applications to the Cell Broadband Engine
      platform. In this Part 6, the authors provide a summary of what the series has
      covered so far.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-cellport6/index.html?ca=drs-]]></link> 
		<pubDate>16 Oct 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Minimize recoding impact, Part 2: Removing obstacles to speedy performance]]></title> 
		<description><![CDATA[The first article in the series describes how to do a basic port to the Cell Broadband Engine process. This
                  second article goes further in hammering out the details, including removing limitations
                  based on DMA-transfer size, partitioning the program across multiple SPEs, and
                  improving the program&apos;s speed even more.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-specode2/index.html?ca=drs-]]></link> 
		<pubDate>16 Oct 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[PS3 fab-to-lab, Part 2: Generating and analyzing signals]]></title> 
		<description><![CDATA[How do you take the Cell Broadband Engine (Cell/B.E.) processor from an
      off-the-shelf Sony PLAYSTATION 3 (PS3) and use it to construct a piece of
      Linux(R)-based laboratory equipment (in essence, take the Cell/B.E. from fab to hab
      to lab)? In this series, Lewin Edwards shows you how to go from game console to
      simple audio-bandwidth spectrum analyzer and function generator. In this article,
      the author shows you how to build on the infrastructure from Part 1 to make the
      system into a fully operational, if primitive, spectrum analyzer.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-ps3lab2/index.html?ca=drs-]]></link> 
		<pubDate>02 Oct 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Porting workshop, Part 5: Mixed-precision workloads]]></title> 
		<description><![CDATA[The seven quick-read parts of this &quot;Porting workshop&quot; series take
      you on a real-world trip from strategy and planning through workload execution,
      performance tweaking, optimization, and a solid conclusion. The series describes how to
      most effectively port compute-intensive applications to the Cell Broadband Engine
      platform.  In this Part 5, the authors determine how to make mixed-precision
      calculations work with the sample application.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-cellport5/index.html?ca=drs-]]></link> 
		<pubDate>02 Oct 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[IBM Installation Toolkit: Loading Linux on POWER]]></title> 
		<description><![CDATA[The IBM Installation Toolkit for Linux on POWER simplifies the installation of Linux on
      virtualized and non-virtualized Power machines, gives you a bootable rescue DVD, and
      provides the software needed to fully exploit the Power platform.  Learn to use the
      toolkit to install Red Hat Enterprise Linux and SUSE Linux Enterprise Server on 
      IBM System p and System
      i5 machines.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/linux/library/l-power-installation-toolkit/index.html?ca=drs-]]></link> 
		<pubDate>26 Sep 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The little broadband engine that could: Use multiple SPEs for a single task]]></title> 
		<description><![CDATA[Peter Seebach uses a simple, iterative-function fractal generator program to describe how to use multiple
    Synergistic Processor Engines (SPEs) to vectorize a single task using the job queue model.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tacklecell4/index.html?ca=drs-]]></link> 
		<pubDate>18 Sep 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Porting workshop, Part 4: Mersenne-Twister]]></title> 
		<description><![CDATA[The seven quick-read parts of this &quot;Porting workshop&quot; series take
      you on a real-world trip from strategy and planning through workload execution,
      performance tweaking, optimization, and a solid conclusion. The series describes how to
      most effectively port compute-intensive applications to the Cell Broadband Engine
      platform. In this Part 4, the authors explore the Mersenne-Twister random-number
      generator to determine its effect.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-cellport4/index.html?ca=drs-]]></link> 
		<pubDate>18 Sep 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Porting workshop, Part 3: Initial performance results]]></title> 
		<description><![CDATA[The seven, quick-read parts of this series, &quot;Porting workshop,&quot; take you on a real-world trip from strategy and planning through workload execution through performance tweaking through optimization to a solid conclusion -- how to most effectively port compute-intensive applications to the Cell Broadband Engine platform. In part three, the authors run and review performance tests and data on the modified code.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-cellport3/index.html?ca=drs-]]></link> 
		<pubDate>04 Sep 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Minimize recoding impact, Part 1: How to make an SPE and existing code work together]]></title> 
		<description><![CDATA[Traditional porting requires identifying and abstracting out the
      architecture-dependent code: making code endian-independent, working through minor
      API differences, and including the appropriate header files and libraries. While
      this procedure works for getting code to run on the Cell Broadband Engine
      (Cell/B.E.) processor, to actually use the extra processing elements, you have to
      put in extra work, including reworking the code and rethinking the build process. In
      this series, learn to take advantage of the Synergistic 
Processor Elements (SPEs) in existing code and only make a minimal impact to the existing code and build process.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-specode1/index.html?ca=drs-]]></link> 
		<pubDate>04 Sep 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Porting workshop, Part 1: Processor porting strategies]]></title> 
		<description><![CDATA[The seven, quick-read parts of this series, &quot;Porting workshop,&quot; take you on
      a real-world trip from strategy and planning through workload execution through
      performance tweaking through optimization to a solid conclusion -- how to most
      effectively port compute-intensive applications to the Cell Broadband Engine
      platform. In part one, discover the top three strategies for porting.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-cellport/index.html?ca=drs-]]></link> 
		<pubDate>07 Aug 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Porting workshop, Part 2: Original code analysis]]></title> 
		<description><![CDATA[The seven, quick-read parts of this series, &quot;Porting workshop,&quot; take you on a real-world trip from strategy and planning through workload execution through performance tweaking through optimization to a solid conclusion -- how to most effectively port compute-intensive applications to the Cell Broadband Engine platform. In part two, explore the original code with Linux profiling tools.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-cellport2/index.html?ca=drs-]]></link> 
		<pubDate>07 Aug 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The little broadband engine that could: Why is my scalar code so slow?]]></title> 
		<description><![CDATA[The SIMD-only architecture of the Cell Broadband Engine (Cell/B.E.)
      processor&apos;s Synergistic Processor Engine (SPE) is an architecture that has no scalar
      operations -- all operations are performed on 16-byte vectors. Design code that helps
      the Cell/B.E. compiler make efficient use of this architecture.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tacklecell3/index.html?ca=drs-]]></link> 
		<pubDate>07 Aug 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Changes in libspe: How libspe2 affects Cell Broadband Engine programming]]></title> 
		<description><![CDATA[The standard library that Power Processor Element (PPE) programs use to
      access and manage Synergistic Processor Elements (SPEs), called
          libspe, has undergone a major revision.  The Cell Broadband Engine (Cell/B.E.)
          SDK 2.1 officially changes the library interface from libspe1 to libspe2.  In
          this article, Jonathan Bartlett introduces the libspe2 concepts and shows how to do basic SPE process management and communication with libspe2.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-libspe2/index.html?ca=drs-]]></link> 
		<pubDate>17 Jul 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The little broadband engine that could: Mailboxes and interrupts]]></title> 
		<description><![CDATA[Meet two more means of communication between the SPE and the PPE -- mailboxes
    and signal notification.  Mailboxes are special-purpose registers, similar to the I/O
    registers used to communicate with peripheral devices on some systems, available on the SPEs and the PPE.  Signal notification registers are registers which can be read or written to by the PPE, but which the SPE can only read.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tacklecell2/index.html?ca=drs-]]></link> 
		<pubDate>03 Jul 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Porting practices: Compute-intensive applications]]></title> 
		<description><![CDATA[The Cell Broadband
    Engine (Cell/B.E.) processor has powerful computation capabilities, but to fully
    unleash its power, you need to provide a unique programming paradigm. In this article,
    learn best practices for porting a JPEG compression application to the Cell/B.E.
    Synergistic Processor Engine (SPE), and see how to take advantage of the processor&apos;s unique architecture and avoid its shortcomings.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-appport/index.html?ca=drs-]]></link> 
		<pubDate>19 Jun 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The little broadband engine that could: An introduction to using SPEs for Cell Broadband Engine development]]></title> 
		<description><![CDATA[In this first article in a series on Cell Broadband Engine (Cell/B.E.) development, Peter
      Seebach introduces the API used to run programs on SPEs, focusing specifically on
      loading code on an SPE and sending data to it for processing.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tacklecell1/index.html?ca=drs-]]></link> 
		<pubDate>05 Jun 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Tech tips: Ten helpful tips when building SPE applications in C]]></title> 
		<description><![CDATA[These ten tips can save you
      a lot of trouble when you&apos;re coding your C applications for the Cell Broadband
      Engine (Cell/B.E.) SPU.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tipspu2/index.html?ca=drs-]]></link> 
		<pubDate>05 Jun 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[PS3 fab-to-lab, Part 1: Build Linux lab equipment from a Sony PLAYSTATION 3]]></title> 
		<description><![CDATA[How do you take the Cell Broadband Engine (Cell/B.E.) processor from an
      off-the-shelf Sony PLAYSTATION 3 (PS3) and use it to construct a piece of
      Linux-based laboratory equipment (in essence, taking the Cell/B.E. from fab to hab
      to lab)? In this series, Lewin Edwards shows you how to go from game console to
      simple audio-bandwidth spectrum analyzer and function generator. First up, uncover
      the design intent of the project and then make a close inspection of the details of
      the user interface implementation as you start a journey to generate and analyze
      signals on the Cell/B.E. processor.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-ps3lab1/index.html?ca=drs-]]></link> 
		<pubDate>15 May 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Core partners, Part 1: Build high-performance apps for multicore processors]]></title> 
		<description><![CDATA[The RapidMind Development Platform provides a simple single-source mechanism to develop portable high-performance applications for multicore processors. In particular, you can use it to develop applications that fully exploit the power of the Cell Broadband Engine (Cell/B.E.) processor&apos;s unique architecture by writing only one, single-threaded C++ program using an existing C++ compiler. In this article, author Michael McCool takes you on a guided tour of the RapidMind Development Platform.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-rapidmind/index.html?ca=drs-]]></link> 
		<pubDate>01 May 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Tech tips: SPU vector intrinsics at your fingertips]]></title> 
		<description><![CDATA[Know these common C/C++ language extensions intrinsics and greatly simplify the arduous task of using the SPU&apos;s assembly language.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-tipspu1/index.html?ca=drs-]]></link> 
		<pubDate>01 May 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[SoC drawer: The Cell Broadband Engine chip: High-speed offload for the masses]]></title> 
		<description><![CDATA[Cell Broadband Engine (Cell/B.E.) chips are leading the broadband revolution in computing and provide the core silicon DNA for supercomputing, medical image processing, and many emergent applications, as worldwide connectivity and bandwidth continue to change the world we live in. This article explores the performance of application code on the Sony PLAYSTATION 3&apos;s Cell Broadband Engine system running Yellow Dog Linux. A simple program demonstrates how multithreaded applications that use the Synergistic Processing Elements to offload work can enjoy tremendous speedup.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-soc12/index.html?ca=drs-]]></link> 
		<pubDate>17 Apr 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Cell/B.E. SDK 2.1: Setting up Fedora Core 6]]></title> 
		<description><![CDATA[Before you can install and use the Cell Broadband Engine (Cell/B.E.) processor SDK Version 2.1, you need to get Fedora Core 6 up and running. Here&apos;s how.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-cellinstallsdk/index.html?ca=drs-]]></link> 
		<pubDate>17 Apr 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Massively multiplayer online games, Part 1: A performance-based approach to sizing infrastructure]]></title> 
		<description><![CDATA[Massively multiplayer online games (MMOGs) are some of the most complicated software systems under development today, often requiring dozens of developers, hundreds of artists, and truly massive infrastructures. This article is the first in a series of articles that will shine a light on the systems, storage, and networks needed to run an MMOG. It provides an introduction to MMOGs and demonstrates one approach to sizing a game&apos;s infrastructure. Learn how to figure out how much infrastructure you might need, as well as how to operate an MMOG.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/wa-mmogame1/index.html?ca=drs-]]></link> 
		<pubDate>10 Apr 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[IBM microNews]]></title> 
		<description><![CDATA[06 April 2007]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/newsletter/power/index.html?ca=drs-]]></link> 
		<pubDate>06 Apr 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[IBM microNews]]></title> 
		<description><![CDATA[06 April 2007]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/newsletter/power/nl59_040607.html?ca=drs-]]></link> 
		<pubDate>06 Apr 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The Power Architecture Time Base register in 64-bit Linux]]></title> 
		<description><![CDATA[Use the Power Architecture technology&apos;s Time Base register to measure time at the nanosecond level in Linux on PowerPC and Cell Broadband Engine (Cell/B.E.)  microprocessors. Applications where this is useful include timestamping transactions (typically encrypted or digitally signed single-use messages), profiling code, and implementing small, precise software delays.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-timebase/index.html?ca=drs-]]></link> 
		<pubDate>04 Apr 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Programming high-performance applications on the Cell/B.E. processor, Part 6: Smart buffer management with DMA transfers]]></title> 
		<description><![CDATA[Explore the concepts of double-buffering and multibuffering to improve code speed by parallelizing processing and data transfer, and allowing the SPE&apos;s memory flow controller (MFC) to coordinate the best order of operations for loading and storing.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-linuxps3-6/index.html?ca=drs-]]></link> 
		<pubDate>03 Apr 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[An introduction to the IDE for the Cell Broadband Engine SDK]]></title> 
		<description><![CDATA[This introductory walk-through, updated for the Cell Broadband Engine (Cell BE) SDK V2.1, explores the Cell BE processor IDE and offers a click-for-click lesson on how to construct a simple project.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/edu/pa-dw-pa-cellide.html?ca=drs-]]></link> 
		<pubDate>30 Mar 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Programming high-performance applications on the Cell BE processor, Part 5: Programming the SPU in C/C++]]></title> 
		<description><![CDATA[In Part 5 of the &quot;Programming high-performance applications on the Cell BE processor&quot; series, apply 
your knowledge of the synergistic processing unit (SPU) to programming the Cell Broadband Engine (Cell BE) processor in C/C++.  Learn how to use the vector extensions, direct the compiler to do branch prediction, and perform DMA transfers in C/C++.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-linuxps3-5/index.html?ca=drs-]]></link> 
		<pubDate>20 Mar 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The Heath Robinson Rube Goldberg Computer, Part 4: The battle to make the virtual cabinets work]]></title> 
		<description><![CDATA[Nothing is as easy as one might hope. Since the last article was posted, the Heath Robinson Rube Goldberg (HRRG) Computer team has been battling every step of the way to bring the HRRG emulator&apos;s virtual cabinets online. On the way, we&apos;ve re-engineered everything several times, and run across some unanticipated scenarios...]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-hrrg4/index.html?ca=drs-]]></link> 
		<pubDate>20 Mar 2007 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[IBM microNews]]></title> 
		<description><![CDATA[09 March 2007]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/newsletter/power/nl57_030907.html?ca=drs-]]></link> 
		<pubDate>09 Mar 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[IBM microNews]]></title> 
		<description><![CDATA[23 March 2007]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/newsletter/power/nl58_032307.html?ca=drs-]]></link> 
		<pubDate>09 Mar 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Programming high-performance applications on the Cell BE processor, Part 4: Program the SPU for performance]]></title> 
		<description><![CDATA[Write optimal code for the Cell Broadband Engine (Cell BE) processor&apos;s synergistic processing unit (SPU) and have your programs running lightning fast. This installment of &quot;Programming high-performance applications on the Cell BE processor&quot; covers SIMD vector programming, branch elimination, loop unrolling, instruction scheduling, and branch hinting techniques. Previous installments have covered the basics of the Sony PLAYSTATION 3, the Cell BE architecture, and SPU programming.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-linuxps3-4/index.html?ca=drs-]]></link> 
		<pubDate>06 Mar 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Assembly language for Power Architecture, Part 4: Function calls and the PowerPC 64-bit ABI]]></title> 
		<description><![CDATA[The ABI, or Application Binary Interface, is the set of conventions that allow
  programs written in different languages or compiled by different compilers to call each
  other&apos;s functions.  This article, the last in a four-part series, discusses the
  PowerPC ABI for 64-bit ELF (UNIX-like) systems and how to write and call functions using it.
  Knowing in detail how the 64-bit PowerPC ABI works will help you write 64-bit programs
  for the POWER5 and other PowerPC-based processors more effectively, whether you program
  in assembly language or not.  There is also a 32-bit ABI that is not covered in this article.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/l-powasm4.html?ca=drs-]]></link> 
		<pubDate>28 Feb 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[IBM microNews]]></title> 
		<description><![CDATA[23 February 2007]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/newsletter/power/nl56_022307.html?ca=drs-]]></link> 
		<pubDate>23 Feb 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Xilinx hijinx, Part 2: Building and loading bitstreams and PowerPC code]]></title> 
		<description><![CDATA[Explore both the hardware and software sides of a complete Virtex4 project. In  this second and final installment of the Xilinx hijinx series, you add and remove device cores from your project, interconnect project components, build the bitstream, integrate it with C code, and download the entire thing to the FPGA.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-xilinx2/index.html?ca=drs-]]></link> 
		<pubDate>22 Feb 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Programming high-performance applications on the Cell BE processor, Part 3: Meet the synergistic processing unit]]></title> 
		<description><![CDATA[Continue looking in depth at the Cell Broadband Engine (Cell BE) processor&apos;s synergistic processor elements (SPEs) and how they work at  the lowest level. This installment explores storage alignment issues and the communication facilities of the SPEs.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-linuxps3-3/index.html?ca=drs-]]></link> 
		<pubDate>22 Feb 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Programming high-performance applications on the Cell BE processor, Part 2: Program the synergistic processing elements of the Sony PLAYSTATION 3]]></title> 
		<description><![CDATA[Take even greater advantage of the synergistic processing elements (SPEs) of the Sony PLAYSTATION 3 (PS3) in this installment of &quot;Programming high-performance applications on the Cell BE processor.&quot; Part 1 showed how to install Linux on the PS3 and explored a short example program. Part 2 looks in depth at the Cell Broadband Engine processor&apos;s SPEs and how they work at the lowest level.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-linuxps3-2/index.html?ca=drs-]]></link> 
		<pubDate>07 Feb 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Xilinx hijinx, Part 1: The ML403 out-of-box experience]]></title> 
		<description><![CDATA[Discover reasons you might choose an FPGA-based system over a traditional hard-IP microcontroller, and identify the learning curve traditional programmers face when meeting RAM-based programmable logic for the first time. In this new series, Lewin Edwards unpacks the Xilinx ML403 Embedded Development Kit and sorts out some of its idiosyncrasies.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-xilinx1/index.html?ca=drs-]]></link> 
		<pubDate>30 Jan 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Assembly language for Power Architecture, Part 3: Programming with the PowerPC branch processor]]></title> 
		<description><![CDATA[The last two articles discussed the outline of how programs on the POWER5 processor work using the 64-bit PowerPC instruction set, how the PowerPC instruction set addresses memory, and how to do position-independent code.  This article focuses on the very powerful condition and branch instructions available in the PowerPC instruction set.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/l-powasm3.html?ca=drs-]]></link> 
		<pubDate>17 Jan 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[SoC drawer: SoCs and the digital content revolution]]></title> 
		<description><![CDATA[SoC (system-on-a-chip) architectures could significantly accelerate digital video processing and enable the digital video revolution. Sam Siewert offers an overview of digital video processing and emergent applications in the video realm and shows how SoCs can uniquely accelerate processing. If you&apos;re an SoC architect, developer, Power Architecture platform software developer, or anyone creating digital video applications and services, this article is for you.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-soc11/index.html?ca=drs-]]></link> 
		<pubDate>17 Jan 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The Heath Robinson Rube Goldberg Computer, Part 3: Introducing the HRRG emulator]]></title> 
		<description><![CDATA[The continuing effort to add at least one series of (vacuum) tubes to the Internet progresses with an introduction to the workings of and thinking behind the Heath Robinson Rube Goldberg (HRRG) emulator. And stay tuned because next time you&apos;ll get to download it.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-hrrg3/index.html?ca=drs-]]></link> 
		<pubDate>10 Jan 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Programming high-performance applications on the Cell BE processor, Part 1: An introduction to Linux on the PLAYSTATION 3]]></title> 
		<description><![CDATA[The Sony PLAYSTATION 3 (PS3) is the easiest and cheapest way for programmers to get their hands on the new Cell Broadband Engine (Cell BE) processor and take it for a drive. Discover what the fuss is all about, how to install Linux on the PS3, and how to get started developing for the Cell BE processor on the PS3.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-linuxps3-1/index.html?ca=drs-]]></link> 
		<pubDate>03 Jan 2007 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Assembly language for Power Architecture, Part 2: The art of loading and storing on PowerPC]]></title> 
		<description><![CDATA[The previous article in this series introduced assembly language programming
      using the 64-bit PowerPC instruction set on POWER5 and other processors that use
      these instructions. This article drills down and discusses the specifics of 64-bit
      PowerPC assembly language programming on Linux and UNIX-like operating systems,
      focusing on data access methods and position-independent code.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/linux/library/l-powasm2.html?ca=drs-]]></link> 
		<pubDate>29 Nov 2006 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Tuning the CPC945 memory controller]]></title> 
		<description><![CDATA[]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-cpc1/index.html?ca=drs-]]></link> 
		<pubDate>21 Nov 2006 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Don&apos;t let these disasters happen to you: A pox on modern engineering, Part 2]]></title> 
		<description><![CDATA[While per-transistor failure rates may be down, overall reliability hasn&apos;t declined as much as people sometimes assume, and modern systems are often much harder to repair than older ones. Following up on a previous article, Lewin Edwards reviews more of the problems modern engineers face.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-enghints4/index.html?ca=drs-]]></link> 
		<pubDate>14 Nov 2006 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The Heath Robinson Rube Goldberg Computer, Part 2: Partitioning the system]]></title> 
		<description><![CDATA[In Part 2 of the Heath Robinson Rube Goldberg (HRRG) Computer series, learn how to partition the system, trading off between implementation complexity, granularity, and flexibility, while also
minimizing the bandwidth required to communicate among the various modules.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-hrrg2/index.html?ca=drs-]]></link> 
		<pubDate>08 Nov 2006 05:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Directions: IBM and partners open up the silicon supply chain with the Common Platform]]></title> 
		<description><![CDATA[Steve Longoria, IBM vice president of Semiconductor Platforms, discusses the collaboration among IBM, Chartered, and Samsung in the open Common Platform technology initiative, and how the move is shaking up the industry&apos;s traditional closed model.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-directions-commplat/index.html?ca=drs-]]></link> 
		<pubDate>26 Oct 2006 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[Don&apos;t let these disasters happen to you: A pox on modern engineering, Part 1]]></title> 
		<description><![CDATA[Between IP litigation and ever greater demands for &quot;baseline&quot; functionality that requires licensing, developing new products has become a treacherous minefield for engineers to navigate.  In this article, Lewin Edwards outlines some of the dangers which are making it harder for engineers to just get out there and build something.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-enghints3/index.html?ca=drs-]]></link> 
		<pubDate>17 Oct 2006 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[SoC drawer: Eyes inside the silicon]]></title> 
		<description><![CDATA[Author Sam Siewert describes basic methods and tools that can provide eyes into the silicon for architects, designers, and engineers working with reconfigurable systems-on-chips (SoCs).  SoCs like the Xilinx Virtex line provide a hybrid platform for hardware and software co-design and implementation of real-time services and digital signal processing.  Hybrid SoCs employing Power  Architecture technology-based software interfacing to highly customized hardware state machines can help designers unlock the power of application-specific hardware acceleration.  The integration of the Power Architecture cores with reconfigurable logic provides a powerful prototyping and product platform for SoCs.  This power can be better unleashed using trace, debug, and analysis tools to visualize and tune hardware and software interfaces and interaction.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-soc10/index.html?ca=drs-]]></link> 
		<pubDate>10 Oct 2006 04:00:00 +0000</pubDate>               
	</item>

	<item>
		<title><![CDATA[The Heath Robinson Rube Goldberg Computer, Part 1: Implementing a computer using a mixture of technologies from relays to fluidic logic]]></title> 
		<description><![CDATA[Imagine a computer formed from a mixture of technologies ranging from relays to fluidic logic. Now imagine being able to create a single piece of such a computer (perhaps as small as a single word of memory) in the technology of your choice, and then using the Internet to run your masterpiece in conjunction with other portions of the system created by contributors located around the world! Author Clive (Max) Maxfield explains the creation of just such a computing engine and how you can be involved.]]></description> 
		<link><![CDATA[http://www.ibm.com/developerworks/power/library/pa-hrrg1/index.html?ca=drs-]]></link> 
		<pubDate>03 Oct 2006 04:00:00 +0000</pubDate>               
	</item>

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