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Assembly language for Power Architecture, Part 1: Programming concepts and beginning PowerPC instructions
The POWER5 processor is a 64-bit workhorse used in a variety of settings. Starting with this introduction to assembly language concepts and the PowerPC instruction set, this series of articles introduces assembly language in general and specifically assembly language programming for the POWER5.
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03 Oct 2006 |
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Linux on board: Inside the MediaMVP
As an MP3 and MPEG player, the Hauppauge MediaMVP lets you play digital media through your television set. As a tightly purposed embedded device, it is an excellent example of a compact Linux implementation on minimal hardware.
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28 Sep 2006 |
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Taking OpenPower for a spin, Part 1: Exploring 64-bit development on POWER5
The OpenPower program offers free remote access to servers running 64-bit Linux on POWER5 processors. In Part 1 of the Taking OpenPower for a spin series, author Peter Seebach introduces the process of getting access to a system and compiling applications for it, both as 32-bit and 64-bit applications. He pays particular attention to issues unique to "guest" software development without root privileges -- something most Linux users have never had to do.
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26 Sep 2006 |
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Taking OpenPower for a spin, Part 3: How to avoid having to port your code
Why is porting even hard? In this last article of the "Taking OpenPower for a spin" series, Peter Seebach looks at what kinds of issues are involved with portability from one architecture to another and contrasts APIs with hardware interfaces.
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26 Sep 2006 |
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Taking OpenPower for a spin, Part 2: Porting issues in targeting 64-bit systems
In Part 2 of the Taking OpenPower for a spin series, Peter Seebach reviews code portability issues when porting to 64-bit systems, looking in particular at code and data portability, with concrete examples of some of the rare kinds of code that require real modification.
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26 Sep 2006 |
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Testing and measuring the TAMS 3011, Part 6: Booting NetBSD on new hardware, the saga begins
Porting an operating system to new hardware can be a fairly easy process, or a fairly difficult one, depending on the issues you encounter. Peter Seebach walks you through his experience getting NetBSD running on a new board using existing hardware.
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19 Sep 2006 |
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Standards and specs: XML: Half a standard is better than none
A pervasive misconception common today is that simply designing your file format around XML somehow makes it magically portable, extensible, and intelligible by other programs. Peter Seebach explains why using XML is only part of the story when you're designing an extensible file format.
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12 Sep 2006 |
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Don't let these disasters happen to you: Five more engineering hints you'll rarely hear
Lewin Edwards presents five more engineering tips, this time aimed at smaller companies without the overhead, or support structures, of a larger organization.
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05 Sep 2006 |
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Multifunction multimedia machine, Part 5: Remote control is the new local interface
Add a Web-based user interface to a previously developed multimedia client in this episode of the Multifunction multimedia machine series. Author Lewin Edwards looks both at user-interface and back-end design issues, and shows how local browser functionality is an interesting alternative to requiring a remote browser.
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29 Aug 2006 |
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SoC drawer: SoC design for hardware acceleration, Part 2
In the SoC design for hardware acceleration series, author Sam Siewert migrates a simple C function to a SystemC specification that can be simulated and verified for ultimate implementation as a hardware function. Part 1 provided the C code and a general overview of video capture, streaming, and processing. Part 2 shows how hardware acceleration of emergent applications, such as video streaming, can benefit from system-on-chip (SoC) design and reconfigurable SoCs with hybrid C software and field-programmable gate array (FPGA)-based functionality.
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22 Aug 2006 |
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Standards and specs: Of RoHS and rushed standards
When the ex cathedra RoHS Directive came down, it was missing a
little crucial piece of information -- how manufacturers, distributors, and purchasers of parts could communicate to each other the RoHS status of every part.
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15 Aug 2006 |
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Debugging Cell Broadband Engine systems
Software development for new architectures can be an intimidating prospect, but the Cell Broadband Engine (Cell BE) SDK 1.1 provides the debugging tools you need to tackle it for the Cell BE architecture. This article describes how to use new versions of the GNU Debugger (GDB) to diagnose problems in both PPU and SPU programs.
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08 Aug 2006 |
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Don't let these disasters happen to you: The top five engineering hints you'll rarely hear
Lewin Edwards presents five engineering tips that are crucially important to successful product engineering, but which are rarely brought up in discussions of engineering practices.
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01 Aug 2006 |
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Power Architecture directions: IBM Design Consulting teams and "collaborative innovation"
Lee Green, vice president, IBM Brand Values and Experience, discusses how the IBM Design Consulting Services (DCS) group came into being, how it works in virtual
teams with clients and other IBM customer and technical service groups, some innovative products resulting from this design collaboration, and how DCS helps IBM penetrate new markets.
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01 Aug 2006 |
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Partition management with EWLM, Part 1: The basic rules
You've gathered performance data with the help of the IBM Enterprise Workload Manager (EWLM) -- now you're ready to exploit this data by enabling intelligent partition management of your AIX and Linux partitions running on IBM System p5 servers. In this first part of a two-part series, you get an introduction to logical partitioning. You're guided through the steps to set up your environment for EWLM partition management, and learn how to configure partitions.
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25 Jul 2006 |
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Power Architecture directions: Brand-new brand for Power Architecture technology
Michael E. Sullivan of IBM discusses how Power Architecture technology is being reborn under Power.org as a community-driven architecture and brand inspired by the open-source Linux model. Learn what motivated the changes, what they will mean for customers and partners, and what the new logo symbolizes.
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24 Jul 2006 |
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Partition management with EWLM, Part 2: Partition management in action
You've gathered performance data with the help of the IBM Enterprise Workload Manager -- now you're ready to exploit this data by enabling intelligent partition management of your AIX and Linux partitions running on IBM System p5 servers. Jump into the action by examining the topology of this test environment and the workload used, looking at the domain policy. Then, run the workload and observe the partition management actions taken by EWLM.
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18 Jul 2006 |
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Page has permanently moved...
This information has been updated for Version 2.0 of the Cell Broadband Engine SDK and is now superseded by two documents, which you can access from the links below. We apologize for any inconvenience.
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12 Jul 2006 |
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Page has permanently moved...
This information has been updated for Version 2.0 of the Cell Broadband Engine SDK and is now superseded by two documents, which you can access from the links below. We apologize for any inconvenience.
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12 Jul 2006 |
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Page has permanently moved...
This information has been updated for Version 2.0 of the Cell Broadband Engine SDK and is now superseded by two documents, which you can access from the links below. We apologize for any inconvenience.
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12 Jul 2006 |
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Maximizing the power of the Cell Broadband Engine processor: 25 tips to optimal application performance
Unlike on conventional processors, you can achieve near
theoretical-maximum performance for real applications on the Cell Broadband
Engine (Cell/B.E.) processor. For this, you must be aware of the Cell/B.E. processor's architectural characteristics: get to know them better with these 25 tips to optimal application
performance.
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27 Jun 2006 |
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Standards and specs: The Interchange File Format (IFF)
The IFF file format had many of the features still sought today in modern file formats. This month's Standards and specs looks at the IFF file format and the lessons it has for modern file formats, such as XML.
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13 Jun 2006 |
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Testing and measuring the TAMS 3011, Part 5: Porting NetBSD to the TAMS 3011
Having looked at Linux and eCos support for the TAMS 3011 in the previous installments, Peter Seebach examines NetBSD support for it, which turns out to entail a certain amount of coding.
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13 Jun 2006 |
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SoC drawer: SoC design for hardware acceleration, Part 1
System-on-chip (SoC) designs offer the opportunity to migrate functionality initially implemented in software and firmware into hardware acceleration engines and state machines. Reconfigurable SoCs based on processors in FPGA fabric, such as the PowerPC 405 in the Xilinx Virtex-4, provide a platform for rapid migration of functionality from PowerPC software and firmware to the FPGA logic. Configurable application-specific integrated circuit (ASIC) SoCs can be optimized similarly over product revisions as SoC ASIC roadmap configurations are defined. This article examines methods for software design, specification, and implementation that will simplify future efforts to offload software functionality to hardware. Basic video and image processing algorithms provide working example algorithms for this article and the next.
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06 Jun 2006 |
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Testing and measuring the TAMS 3011, Part 4: Interfacing with flash and avoiding file systems
The Z-machine interpreter is a benchmark for OS functionality and development environments. With the groundwork of porting curses accomplished in Part 3, this article shows you how to complete the Z-machine interpreter, setting it up to use flash memory to save state, without the newfangled luxury of a file system.
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30 May 2006 |
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Initializing memory efficiently on Power Architecture platforms
Learn to efficiently initialize memory on Power Architecture systems. Software Developer Carlos Cavanna compares simple loops clearing one byte at a time to more elaborate algorithms, including the DCBZ instruction to zero whole cache lines at a time. The article concludes with some rough performance numbers to help you tune your own applications.
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23 May 2006 |
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Standards and specs: Lies, statistics, and benchmarks
Benchmarks can be an excellent tool for predicting performance and estimating requirements. They can also be misleading, possibly catastrophically so. Benchmark standardization helps distinguish between a good estimate and a meaningless number.
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23 May 2006 |
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Building SOA applications with reusable assets, Part 2: SOA recipe reference example
This series explores how reusable assets, recipes and software patterns can facilitate the development of SOA solutions. This second article describes a reference example in which a recipe can be applied. Future articles will show how to apply SOA patterns to this reference example to satisfy non-functional requirements.
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23 May 2006 |
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Meet the experts: Peng Wu and Alex Eichenberger on compilers and hardware constraints
Programming in high-level languages such as C is like crossing an ocean without spending time looking at the water. developerWorks spent an hour with two IBM Research Compiler programmers exploring the ecosystem that lies beneath the surface.
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10 May 2006 |
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SoC drawer: SoC prognostication
Since its emergence about a decade ago, the SoC (system-on-a-chip) architecture has become the underlying architecture for many embedded systems and scalable supercomputers and is starting to find its way into general purpose computing as well. The SoC embodies what many believe to be the ultimate level of integration: an entire system on one chip. Moore's law and higher levels of integration made the SoC inevitable, but can this continue? And what's next? This article takes a step back to gain perspective on the SoC and to see where it is going in the future. Perhaps the more important question is: where should the highest level of integration be, and what will it enable 25 years from today?
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05 May 2006 |
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Everything you ever wanted to know about C types, Part 4: Portability and pitfalls
Effectively use the C type system, with help from Peter Seebach, as he covers Hungarian notation (the good kind and the bad kind), using typedef, portability issues, and major pitfalls.
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02 May 2006 |
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Cell Broadband Engine processor DMA engines, Part 2: From an SPE point of view
The Cell Broadband Engine (Cell BE) architecture provides on-chip DMA capabilities between the PPE and the SPEs. Meet the SPE interface to the DMA capabilities of the processor, from channel allocation to communication.
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02 May 2006 |
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CPI analysis on POWER5, Part 2: Introducing the CPI breakdown model
Make substantial improvements in performance analysis with a CPI analysis model built on the tools introduced in Part 1. Learn ways to analyze the specific performance counter data produced by profiling runs to obtain statistics for events which the CPU cannot directly report on.
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25 Apr 2006 |
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Standards and specs: Chip interconnects: When 133 MBps is too slow
New interconnect protocols and standards offer a variety of options in price and performance. Peter Seebach looks at four new protocols and ponders why we have more than one.
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24 Apr 2006 |
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The Cell Broadband Engine processor security architecture
The unrelenting evolution toward an even more open and connected computing infrastructure requires robust security to thrive. Learn how the Cell Broadband Engine processor's security architecture is uniquely suited for the challenges of this digital future.
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24 Apr 2006 |
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Five minutes with: Mark Nutter and Max Aguilar on the Cell BE memory model
The Power Architecture PowerPC core and the Cell Broadband Engine (Cell BE) PPE unit: how different are they? Find out why there is "nothing to fear" from Cell BE programming, after all.
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18 Apr 2006 |
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SPU pipeline examination in the IBM Full-System Simulator for the Cell Broadband Engine processor
Find out the exact cycle where the SPE stalls, or identify a poor choice of branch predictions, using pipeline tracing in the Cell Broadband Engine (Cell BE) simulator.
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17 Apr 2006 |
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CPI analysis on POWER5, Part 1: Tools for measuring performance
This article begins a short series on workload performance analysis on Power Architecture systems. Part 1 introduces the CPU feature set and a variety of useful tools for collecting data.
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04 Apr 2006 |
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Tuning the CPC925 memory controller
Give your development on the PowerPC 970 board a stable foundation by tuning the IBM CPC925 memory controller to match your board's analog characteristics. Author Neil Leeder gives step-by-step instructions on tuning the IBM CPC925 North Bridge chip for different memory configurations and selecting a middle-of-the-road parameter set to cope with different user-installable memory amounts and configurations.
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28 Mar 2006 |
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Power Architecture downloads and documentation: Upgrade your Cell BE SDK components
Download new and improved Cell Broadband Engine (Cell BE) SDK components -- the Full-System Simulator, the Software Sample and Library Source Code, and the XL C Alpha Edition compiler. Try out the latest Watson Sparse Matrix Package with a new symmetric indefinite solver with diagonal pivoting. Plus, read more on z9 109, z/OS, p5, and the IntelliStation POWER 185, and get the 750GX/GL Evaluation Board Schematics. And plan your summer Redbooks residency.
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24 Mar 2006 |
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Testing and measuring the TAMS 3011, Part 3: Porting a screen-management utility to eCos
See the process of porting the Berkeley curses library from UNIX to eCos, picking up a few fragments of the Berkeley C library extensions along the way -- and learn about some general issues of porting from UNIX to eCos.
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24 Mar 2006 |
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SoC drawer: Detecting and correcting I/O and memory errors
SoCs (systems-on-chips) are often deployed in communications, storage, network processing, and mission-critical embedded data processing systems. A reliable SoC-based system must mitigate and control environmentally induced errors in stored or transported data. It is impossible to fully prevent data loss, but engineering due diligence is required to ensure that systems are as safe as practically possible given current data coding methods for error detection and correction. This article examines methods to minimize potential data corruption and to maximize system safety when uncorrectable errors do occur.
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21 Mar 2006 |
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Everything you ever wanted to know about C types, Part 3: Implementation details
The C type system has changed a lot since the 1970s. Part 3 in the "Everything you ever wanted to know about C types" series reviews some of the quirks that particular implementations have had and discusses the changes the C99 language revision introduced.
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19 Mar 2006 |
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Migrating from x86 to PowerPC, Part 9: Sensors, sensors, sensors!
From schematics to code, get a leg up on building your own robot submarine.
Building on previous successes, Lewin Edwards shows how to add more sensors to your
submarine, looking at the design requirements of different sensors and ways of
sanity checking the results they provide.
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14 Mar 2006 |
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Standards and specs: Not by UNIX alone
Technology professionals have loosely used the term "UNIX" since the first person had to explain the difference between the Berkeley and AT&T flavors, so it's not surprising to find as many UNIX standards as there are versions of the operating system. Peter Seebach wades through the wellspring of UNIX standards and sorts them out for you, concluding that the rumors of the death of UNIX are (as usual) greatly exaggerated.
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08 Mar 2006 |
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Multifunction multimedia machine, Part 4: Mixing hardware and software for cost control
Explore the technical issues in video playback, and see how a blend of hardware and software achieves good performance at a reasonable cost. Also, Lewin Edwards reveals that MP3 does not mean MPEG-3, which alone is worth the price of admission.
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07 Mar 2006 |
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Testing and measuring the TAMS 3011, Part 2: An introduction to eCos
The eCos embedded operating system offers an alternative to UNIX-style operating systems for development work. This article examines how its architecture influences the development process, building a sample application and exploring the differences in architecture between eCos and UNIX.
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24 Feb 2006 |
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SoC drawer: Shared resource management
The goal of a system-on-a-chip (SoC) is to provide a single-chip system, and therefore SoC resource analysis and sizing is critical. Failure to properly size processing, memory, or I/O needed by software services can kill an SoC project. But all too often, SoC design analysis focuses on processing at the expense of memory or I/O sizing. And even when memory and I/O are sized properly, efficient use of these resources by software services can still be tricky. Any mis-sizing or mismanagement of memory and I/O on an SoC can at the least cause significant project delay and rework. This article examines sizing estimation and resource sharing pitfalls that the system architect should know well.
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21 Feb 2006 |
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Everything you ever wanted to know about C types, Part 2: Floating point and derived types
The C type system is often misunderstood or overlooked. This article, the second in a series, discusses the derived types, or types that are built from other types, and some of the interactions that occur when data of multiple types are mixed.
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14 Feb 2006 |
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Meet the experts: An interview with the compiler
Got questions about optimizing code for the Cell Broadband Engine (Cell BE) processor? Questions like, when to inline? When to insert an ifetch--and when to inline an ifetch (and what IS an ifetch?) And where do no-ops go? These questions and many others will be addressed in this exclusive Q and A session.
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14 Feb 2006 |
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An introduction to compiling for the Cell Broadband Engine architecture, Part 1: A bird's-eye view
This five-part tutorial series helps you understand the Cell Broadband Engine (Cell BE) architecture and gives you a basic intuition for programming issues on it, insight into the compiler challenges presented by it, and an understanding of the techniques and solutions proposed by the IBM compiler. In Part 1, meet the Cell BE processor from a compiler-writer's perspective, and get a bird's-eye view of a number of the unique challenges it poses. Part 1 provides useful background information relevant to the other tutorials in the series.
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07 Feb 2006 |
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An introduction to compiling for the Cell Broadband Engine architecture, Part 5: Managing memory
Fifth and last in the "An introduction to compiling for the Cell Broadband Engine architecture" series, this tutorial discusses techniques for managing data in the local store of the Synergistic Processor Elements (SPEs) of a Cell Broadband Engine (Cell BE) processor. Learn particular techniques such as double-buffering and maintaining a reasonably efficient software cache.
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Tutorials |
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07 Feb 2006 |
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An introduction to compiling for the Cell Broadband Engine architecture, Part 4: Partitioning large tasks
This tutorial, fourth and penultimate in the "An introduction to compiling for the Cell Broadband Engine architecture" series, discusses ways to partition code to run across the multiple cores available in a Cell Broadband Engine (Cell BE) processor. It gives particular attention to efficient partitioning of code to allow larger programs or data sets to be manipulated using the 256KB of local store available on the Synergistic Processor Elements (SPEs).
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07 Feb 2006 |
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An introduction to compiling for the Cell Broadband Engine architecture, Part 3: Make the most of SIMD
Third in the "An introduction to compiling for the Cell Broadband Engine architecture" series, this tutorial discusses the compiler issues in optimizing code to run efficiently on SIMD-capable processors. In particular, it shows how to optimize code that must run both on the VMX SIMD engine of the PowerPC core of the Cell Broadband Engine (Cell BE) processor, and also on the SIMD-only Synergistic Processor Elements (SPEs).
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Tutorials |
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07 Feb 2006 |
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An introduction to compiling for the Cell Broadband Engine architecture, Part 2: Optimizing for the SPE
Second in the "An introduction to compiling for the Cell Broadband Engine architecture" series, this tutorial discusses specific issues in optimizing code to run effectively on the Synergistic Processor Elements (SPEs) in the Cell Broadband Engine (Cell BE) processor.
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07 Feb 2006 |
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Power Architecture directions: Power.org at the one-year crossroads
As Power.org celebrates its first birthday, take a look at what happened in year one and what's ahead. MacLaren Harris interviews Marketing Programs Manager for Power.org Jesse Stein and discovers what is working and what needs work; how Power.org has grown and what has been achieved; and how individual developers can participate.
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27 Jan 2006 |
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SoC drawer: Real-time resource management
Systems-on-chips (SoCs) can support applications ranging from those that simply need to maximize throughput to those that must meet hard real-time deadlines. This article gives an in-depth look at SoC design for real-time applications. Get a review of best-effort, soft real-time, and hard real-time requirements, along with a detailed examination of how an SoC can best support traditional real-time scheduling policies and resource feasibility testing.
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17 Jan 2006 |
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Multifunction multimedia machine, Part 3: Scripting and scaling for fun and profit
Lewin Edwards looks at the history and design of X and why it matters for an embedded graphics system and introduces a basic scripting language for controlling a multimedia display device.
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10 Jan 2006 |
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Everything you ever wanted to know about C types, Part 1: What's in a type?
This article, first in a four-part series, introduces the basics of the C type system, with an overview of what it means to talk about type and a discussion of the basic types (integer and floating point) in some detail.
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03 Jan 2006 |
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Standards and specs: An unsung hero: The hardworking ELF
The ELF object module format has had wide-ranging effects on software development for multiple platforms. Peter Seebach looks at the history of the ELF specification and why it's been so useful.
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20 Dec 2005 |
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SoC drawer: SoC concurrent development
A system-on-a-chip (SoC) can be more complex in terms of hardware-software interfacing than many earlier embedded systems because an SoC often includes multiple processor cores and numerous I/ O interfaces. The process of integrating and testing the firmware-hardware interface can begin early, but without good management and testing, the mutability of firmware and early stages of hardware design simulation can lead to disastrous setbacks for a project. This article teaches system designers about tools and methods to minimize project churn.
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20 Dec 2005 |
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A brief introduction to IBM XL compilers
The IBM XL compilers are the result of years of research, and can compile C/C++ and Fortran code on a variety of Power Architecture technology-based systems and operating systems. The broad scope of these compilers illustrates the strength and breadth of Power Architecture technology.
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15 Dec 2005 |
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PowerPC system-on-a-chip introduction
System-on-a-chip (SoC) design is becoming an increasingly attractive alternative to system developers -- and the PowerPC 400 series of processors are a perfect match for this philosophy. Read on to find out why.
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15 Dec 2005 |
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Embedded operating systems for IBM Power Architecture technology
To Linux or not to Linux? Embedded developers love using Linux because of the wealth of tools and applications available for it; but it doesn't have all the real-time capabilities that some embedded applications need. This article looks at some operating system options for dealing with embedded applications.
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15 Dec 2005 |
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The year in Power Architecture technology: The best of 2005
The year that just was (or perhaps is about to just have been) has been chock full of Power Architecture news -- from Apple's departure from the Power Architecture family to the up and coming Cell Broadband Engine (Cell BE) processor; from Blade.org to Power.org; and from being named fastest growing semiconductor supplier of 2005 to being named 2005 Top Fab, find out why Power Architecture technology is having the best year ever.
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15 Dec 2005 |
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POWER to the people
In the last decade alone, IBM scientists have announced one semiconductor breakthrough after another: copper technology, silicon-on-insulator, silicon germanium, strained silicon, and low-k dielectrics. All of these technologies came out of IBM's fertile in-house research community. This prowess in modern chipmaking know-how didn't come out of a vacuum -- rather, it came out of the hermetically-sealed clean rooms of the most advanced R & D department in the semiconductor industry.
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15 Dec 2005 |
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IBM PowerPC 970FX power-on reset mechanism
The sophisticated PowerPC 970FX processor requires more sophisticated power-on reset logic. Find out what you need to know to develop systems based on this new processor.
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15 Dec 2005 |
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Implications of Power Architecture technology and IBM eServer OpenPower for IBM and the industry
What does the OpenPower initiative herald for open systems and the Power Architecture? In this interview, Adalio Sanchez, general manager, IBM eServer pSeries line, talks about how OpenPower aims to bring the dynamics of the open source community to the hardware realm.
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15 Dec 2005 |
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Just like being there: Papers from the Fall Processor Forum 2005: Introducing the IBM PowerPC 970MP
This Fall Processor Forum paper explores the PowerPC 970MP, a 90nm-process, dual-core version of the PowerPC 970FX with remarkable, dynamic power-saving features. It's like no 64-bit dual-core PowerPC processor you've ever met before. Read why.
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14 Dec 2005 |
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Cell Broadband Engine processor DMA engines, Part 1: The little engines that move data
A single Cell Broadband Engine (Cell BE) processor consists of one PowerPC core and eight SPEs each having their own DMA engine. The DMA engines are a key component of the overall Cell Broadband Engine Architecture (CBEA) as they move data between SPEs and the PowerPC core. Any operating system or application wishing to utilize the SPE depends on the DMA engines to manage work flow on behalf of the SPEs.
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06 Dec 2005 |
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Just like being there: Papers from the Fall Processor Forum 2005: Application-customized CPU design
This Fall Processor Forum paper explores the customized IBM PowerPC processor designed for the Microsoft XBox 360, designed and optimized for high-volume production, low cost, and quality -- with an array of testing and debug features to reduce system time-to-market. It boasts three 3.2GHz high-frequency PowerPC processor cores, and it's like no chip you've ever met before. Read why.
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06 Dec 2005 |
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Meet the experts: David Krolak on the Cell Broadband Engine EIB bus
Understanding the Element Interconnect Bus (EIB) is an essential component to maximizing performance on the Cell Broadband Engine (Cell BE) Architecture. The lead designer and EIB project manager sit down for an hour with developerWorks' Meet The Experts to discuss ring versus interconnect buses, data arbiters, and bus protocols.
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06 Dec 2005 |
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Power Architecture community calendar: IBM wins National Medal of Honor
IBM scores the National Medal of Technology for innovation and continues to innovate by unveiling a new SOI-less, hybrid-orientation process that speeds pFET transistors yet doesn't affect nFET performance. Visit the first Power Architecture design center that is outside IBM control. View year-end online conferences (on SoC and processor design), and plan for such 2006 events as CES, DAC, PartnerWorld, and Embedded Systems.
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01 Dec 2005 |
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Cell Broadband Engine Architecture and its first implementation
Explore the first implementation of the Cell Broadband Engine (Cell BE) Architecture, developed jointly by Sony, Toshiba, and IBM, and get an up-close look at its performance figures and characteristics.
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29 Nov 2005 |
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Signals as a Linux debugging tool
By focusing on the analysis of data captured using signal handlers, you can speed up the most time-consuming part of debugging: finding the bug. This article gives a background on Linux signals with examples specifically tested on PPC Linux, then goes on to show how to design your handlers to output information that lets you quickly home in on failed portions of code.
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29 Nov 2005 |
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Power Architecture downloads and documentation: Cell Broadband Engine resources on alphaWorks
Download Cell Broadband Engine (Cell BE) technology and a graphical LPAR monitor. Update your Blue Gene Task Layout Optimizer and your PowerPC 970 full-system simulator. And discover fascinating articles on Advanced POWER Virtualization, Attached Network Storage, MRAM and spintronics, and how to simulate PowerPC hardware for Linux development.
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29 Nov 2005 |
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Just like being there: Papers from the Fall Processor Forum 2005: Unleashing the Cell Broadband Engine Processor
This paper from the MPR Fall Processor Forum 2005 explores the Cell Broadband Engine (Cell BE) Processor's Element Interconnect Bus (EIB). Designed to handle the bandwidth demands of a nine-core processor running at 3GHz, it's like no bus you have ever met before. Read why.
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29 Nov 2005 |
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Meet the experts: The Mambo team on the IBM Full-System Simulator for the Cell Broadband Engine processor
The IBM Full-System Simulator for the Cell Broadband Engine (Cell BE) processor, affectionately known inside IBM as Mambo, is a key component of the newly posted offerings on alphaWorks. Meet some of the members of the team that pulled it together, and hear about the simulator in their own words.
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22 Nov 2005 |
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Meet the experts: Alex Chow on Cell Broadband Engine programming models
A critical component of programming for the Cell Broadband Engine (Cell BE) processor is understanding the workload in order to choose the right programming model. Alex Chow of IBM recently proposed several programming models ranging in complexity from a small single SPU to a large interconnected multi-SPU program. developerWorks talks with Alex about some of the programming models he proposed.
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22 Nov 2005 |
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PowerPC Architecture Book
This three-volume set defines the instruction and registers used by application programs, the storage models, privileged facilities, and related instructions.
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16 Nov 2005 |
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PowerPC Architecture Book, Version 2.02
This 3 volume set, Version 2.02, defines the instruction and registers used by application programs, the storage models, privileged facilities, and related instructions for the IBM POWER5 processor family. Verson 2.01 describes POWER4 and POWER4+ processors.
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16 Nov 2005 |
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PowerPC Architecture Book, Version 2.02
This three-volume set, Version 2.02, defines the instruction and registers used by application programs, the storage models, privileged facilities, and related instructions for the IBM POWER5 processor family. Verson 2.01 describes POWER4 and POWER4+ processors.
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16 Nov 2005 |
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Meet the experts: Dan Brokenshire and Sid Manning on the alphaWorks downloads for the Cell Broadband Engine
Meet the downloads: Sid Manning and Dan Brokenshire of IBM tell what's in 'em and answer tough questions like "Why Linux?" and (more importantly) "Why Linux on Intel?"
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16 Nov 2005 |
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Just like being there: Papers from the Fall Processor Forum 2005: Unleashing the power of the Cell Broadband Engine
This paper from the MPR Fall Processor Forum 2005 explores programming models for the Cell Broadband Engine (CBE) Processor, from the simple to the progressively more advanced. With nine cores on a single die, programming for the CBE is like programming for no processor you've ever met before. Read why.
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16 Nov 2005 |
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Power Architecture community calendar: Cell Broadband Engine developer environment arrives
Now available, a complete programming environment for the Cell Broadband Engine (CBE) -- a processor environment simulator, XL C and GCC compilers, an OS kernel, toolchain, library, and samples, as well as a CBE resource center. And, IBM and Sun agree to support Solaris on Blades, and Power.org cranks up technology seminars with three new academic partners. Then plan for such Fall events as Semicon Japan, PowerPC technical briefings in China, and assorted webcasts and Redbook workshops.
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15 Nov 2005 |
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Power Architecture downloads and documentation: Complete developer environment for the Cell Broadband Engine
Download a complete programming environment for the Cell Broadband Engine (CBE) -- the software development kit, a processor environment simulator, XL C and GCC compilers, an OS kernel, toolchain, library, and samples -- to get you started. Visit the new Cell Broadband resource center, a home for articles, tutorials, forums, and news of the CBE processor. And discover fascinating articles on these technologies, as well as articles on BladeCenter, POWER Virtualization, and System z9.
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11 Nov 2005 |
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RAID on Linux on POWER
Learn about software and hardware redundant array of independent disks (RAID) implementations on a Linux on POWER server. In some regards, this paper is a response to some of the questions and pitfalls in RAID setup. Therefore, this paper includes a foundation on RAID itself, the Linux on POWER boot process, software and hardware RAID, and an example of how to configure hardware RAID.
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03 Nov 2005 |
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Clustering solutions for Linux on IBM System p5 Express servers
Learn how to build a Linux High Availability (HA) cluster and a High Performance Computing (HPC) cluster on IBM POWER processor-based servers.
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02 Nov 2005 |
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Debugging simulated hardware on Linux, Part 1: Device driver debugging
This two-part series is geared toward easing device driver development. This first part illustrates proven methods you can use to test the complete code flow of a device driver during the design, development, and debugging stages.
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02 Nov 2005 |
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Power Architecture community calendar: Xbox 360 unveiled
Look inside Microsoft Xbox 360's trio of PowerPC cores; sneak a peek at P.A. Semi's plans for a new low-power processor, the PWRficient; and discover how IBM is "sharpening" its blades for 2006. And plan for Fall events such as the IEEE Silicon Debug and Diagnosis Workshop, the System-on-Chip symposium, and assorted webcasts and Redbook workshops.
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01 Nov 2005 |
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Standards and specs: Digital rights management: When a standard isn't
Whether you're a buyer or a seller of a product, the essential goal of standardization is to make interoperability possible, allowing communication with anyone else using the same protocol and media. In some cases though, vendors have specific reasons for not being compatible -- and those vendors have developed a standard for incompatibility, digital rights management (DRM). The goal of DRM is to limit compatibility because things which are compatible can be copied and distributed freely. In this installment, Peter Seebach looks at a potential oxymoron -- standards designed to subvert and prevent interoperability.
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01 Nov 2005 |
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SoC drawer: Function allocation and specification
The system-on-a-chip (SoC) has emerged as the ideal replacement for multipart chipsets. The SoC design promises a single-chip solution, lower power, less board real estate, simpler integration, and lower part counts -- all of which are clearly quite attractive for emergent embedded products. However, packing all the resources needed into a single-chip solution is no easy task: mistakes in sizing on-chip resources require spinning the ASIC or giving up on the single-part solution and adding to the pin and part counts. In this article, Sam Siewart reviews approaches for the early function allocation analysis required to architect an SoC.
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01 Nov 2005 |
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Power Architecture downloads and documentation: Blue Gene tools and residency
Find a wealth of Blue Gene resources, an updated Post-Link Optimization for Linux on POWER, new and updated documentation on Power Architecture boxen, the latest Redbook Residency opportunities -- and much more.
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27 Oct 2005 |
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Testing and measuring the TAMS 3011, Part 1: Embedded Linux cross-development
The TAMS 3011 offers a PowerPC embedded environment with tools and features familiar to embedded developers. This article subjects it to the Zork test.
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25 Oct 2005 |
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Standards and specs: Early adopters
Whether a standard will succeed and be widely adopted is ambiguous at first, regardless of who endorses it -- a major player or a fringe element. So why would people put all their eggs in a standards basket when that basket might not exist tomorrow? Join Peter Seebach as he shows the potential advantages of adopting a standard before it becomes one. (Of course, he hasn't forgotten the potential disadvantages, too.)
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18 Oct 2005 |
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Power Architecture community calendar: Cell Broadband Engine Processor debuts in new Blade server
Blades get Cell BE Processors and a cut in price to run Linux; POWER5+ debuts with two POWER5s and cache on one module; and small businesses get 22 new, affordable managed-services products. As well as find information on the Fall Processor Forum 2005, IBM Webcasts, and other events worthy of your attention.
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17 Oct 2005 |
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PowerPC processor tips: Two PowerPC 750GXs are better than one
Achieve a level of high reliability in a microprocessor system by adding a second identical processor to a system to monitor and verify the system processor operation -- also known as the lockstep processor technique. This tip illuminates the integrated lockstep facility (LSF) in the IBM PowerPC 750GX processor.
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17 Oct 2005 |
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Power Architecture downloads and documentation: Subscription service updates
Subscribe to support bulletin updates for Cluster Systems Management and AIX, and get the following dowloads: techniques for performance tuning the eServer JS20 BladeCenter running Linux on PowerPC 970, the PowerPC 405 Evaluation Kit, a utility to power and frequency scale the PowerPC 970, and the IBM Softcopy Reader. Read the R&D Journal double issue on Blue Gene and POWER5 and packaging, how to simplify your storage infrastructure, three books on Blue Gene (on hardware, sysadmin, and application development), how to secure your e-mail server with Linux, and discover the z/OS technical library.
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12 Oct 2005 |
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Migrating from x86 to PowerPC, Part 8: Add stepper motors to the vehicle control module
Lewin Edwards reviews the I/O expansion possibilities for the slave microcontroller on the robot submarine. The Inter-IC Communication (I2C) bus provides a simple and compatible way to expand the submarine's I/O options and connect it to a number of stepper motors.
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11 Oct 2005 |
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Meet the experts: On open source firmware development
Slimline Open Firmware (SLOF) provides a largely machine-independent BIOS, illustrating what is needed to initialize and boot Linux, a hypervisor, or any other operating system or virtualization layer on PowerPC-based machines based on the de-facto industry Open Firmware boot standard. Join three experts as they discuss the decisions in developing SLOF and where they'd use it and provide a picture of the boot-up process under SLOF.
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11 Oct 2005 |
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