Organizations in the semiconductor industry are facing immense pressure from growing product complexity, escalating design costs, exponential growth in use of embedded software, and relentless pace of innovation. Very often, the product launch schedule, development budget, and quality target are not met. Organizations in electronics design and automation (EDA) recognize the need to collaborate and define a set of unified processes and tools for their hardware and software development teams. It is crucial to bring the two vital divisions together, because the success of any product in the systems and hardware industry is hugely dependent on how well the hardware and software divisions integrate and collaborate with each other during the product development lifecycle.
IBM® Rational® ClearCase® is an established configuration management solution with enterprise-level scalability and the flexibility to implement highly customizable process models within a wide range of supported environments. Cadence Design Framework II (DFII) is a widely used tool in EDA. ClearCase integration with Cadence DFII takes advantage of the key capabilities of ClearCase in the EDA domain.
This solution can be used by EDA engineers as a configuration management tool to manage design artifacts, such as the library, cellviews, cell folders, file assets (including XML databases), PSF, circuit design language (CDL), and other related artifacts. The integration supports both Open Access (OA) and Common Database (CDB) formats. Organizations can use ClearCase as the configuration management tool for managing both software and hardware artifacts for faster development, seamless system integration, increased productivity, and shorter time to market.
ClearCase for enterprise-level configuration and change management in EDA
Electronic design and automation (EDA) is a complex development activity, and hardware designers face several challenges during the engineering phase. Some of the key challenges are handling large design artifacts, collaborating with remote engineers, streamlining the development activity to avoid merging, maintaining data integrity, and ensuring traceability of changes. ClearCase is designed with these types of needs in mind and built with capabilities such as dynamic views and atomicity. Rational® ClearCase MultiSite® supports automatic replication and synchronization, maintains data integrity and enables collaboration across distributed development teams.
In addition, ClearCase integrates with IBM® Rational® ClearQuest®, an enhanced request management tool that includes an ALM schema and supports ClearQuest Application Lifecycle Management (ClearQuest ALM). A change management process built on top of ClearQuest ALM track and manages enhancements and changes for both hardware and software in the same tool. This is especially helpful because many times, when the change or enhancement is first created, people aren't sure whether it will be fixed in hardware or software.
This article highlights the key benefits and features of the ClearCase integration with Cadence DFII.
ClearCase Cadence DFII integration provides key capabilities that can be leveraged by the semiconductor industry to solve various challenges faced during the product development life cycle.
The Rational ClearCase integration with Cadence Design Framework II provides rich user interface capabilities, as well as operations from the command line interface. The integration points are available through the Cadence Library Manager, the ClearCase Work Area Manager, and the command line.
IBM Rational ClearCase integration with Cadence Design Framework II enables designers to perform design management operations on design artifacts through rich integrated menus and context menus from the Cadence Library Manager, which constitutes their design environment. Designers can manage design artifacts (check out, modify, and check in design files, category files, and so forth) without leaving their design and development environment. Figure 1 shows a screen view of Cadence Library Manager integrated with ClearCase.
Figure 1. Cadence Library Manager UI
The ClearCase Work Area Manager is one of the key highlights of this integration, because it offers designers an interface that presents the information in a format most suitable with the workflow of designers. It allows users to perform design management operations besides displaying ClearCase-specific information. As Figure 1 shows, you can bring up the Work Area Manager from either the Design Manager menu or from the Browse Library sub-menu item in Properties (Design Manager > Properties). A snapshot of the ClearCase Work Area Manager UI is shown in Figure 2.
Salient features of ClearCase Work Area Manager:
- It provides an elaborated display for every design artifact, with status, user information, version identifier, replica name, and configuration specification selection rules.
- You can edit config spec rules to instantly change the configuration of the ClearCase view.
- The Flatten library feature gives a flattened view of all cellviews in the library so that cellviews can be sorted, based on attributes such as source control state, user, timestamp, replica, and version.
- You can select multiple library, cell or cellviews and perform design management operations.
- Operations on design artifacts listed in a specific category can be aggregated by selecting the Show Category filter (for example, all designs listed under the Pin category can be listed and checked out at once).
- The "Check in all checked out" option allows designers to check in all of the checked-out files in the workspace at once.
- In a ClearCase MultiSite environment, you can view the current mastered replica information and the checkout information across replicas.
- You can launch ClearCase native user interfaces, namely the Version Tree Browser and the History Browser for library, cell, and cellview.
- Labels can be created and applied on library, cell, and cellview.
- The "Browse hierarchy" sub-menu item in the Library Manager launches the Work Area Manager and shows all of the cellviews referenced from the selected cellview in a hierarchical manner.
To open a design, you must use the Library Manager.
Figure 2. ClearCase Work Area Manager UI
The integration provides a command line interface for the basic source control operations shown in Table 1.
Table 1. Basic source control operation commands
|Check in (includes add to source control) -||gdmci|
|Show file status||gdmstatus|
Figure 3 shows a snapshot of the command line interface where the outputs of
on a cellview are displayed.
Figure 3. ClearCase-Cadence integration command line interface
Design libraries are huge, vary in size, and can even extend to gigabytes. Designers mostly work on one cell or cellview at a time but need to load the whole library to set up their workspaces. This can create a bottleneck when the library is huge. With the dynamic view, the designers have instant access to the workspace. The cells or cellviews that designers are working on are loaded dynamically when they open them for read/write operations and, at the same time, they have a view of the entire library without the need to load it locally. There is no extra overhead involved in IP handoff and tapeout phases. These advantages lead to faster development.
A designer works on a cellview, such as a schematic diagram or a physical layout, which is considered the lowest level entity in a Cadence design library. A cellview consists of multiple files on the file system called a co-managed set. The co-managed sets of a cellview should always be treated as a single entity. It is very important that the version number of all these files always remains the same to maintain system consistency and data integrity. The atomic check-in feature of ClearCase ensures that either all of the checked-out files are checked in or none are. This saves the effort and time needed to ensure system consistency, so it results in lower administrative cost.
The integration supports the use of Rational ClearCase with Cadence Design Framework II running in either 32-bit or 64-bit modes. EDA engineers who are designing and developing complex systems on chips and want to leverage the power of computing provided by 64-bit operating systems get an edge by enabling the integration for 64-bit mode. Support for 64-bit mode is available in all the three interfaces: Cadence Library Manager, ClearCase Work Area Manager, and the command line. For supporting large 64-bit schematic and layout designs, the combination of ClearCase dynamic view and 64-bit execution mode of integration speeds design time and increases performance.
Today, designing and developing a complex System-on-Chip (SoC) needs collaborative effort of several designers and developers with specific expertise and skill sets. Organizations are opting to work in geographically distributed teams to tap into the niche skill sets, contain the production cost, speed up the execution time, and gain a competitive edge in the electronics industry. This proliferation of globally distributed teams is becoming increasingly complex. Integration of Cadence Design Framework with Rational ClearCase as the enterprise source control management tool helps EDA organizations leverage the ClearCase MultiSite capability and counter the challenges of geographically distributed development.
- In geographically distributed development environments, design and development are distributed across multiple sites. Teams at each site have their own replica to work with, so that designers will work with local data, with latest changes synched across the multiple sites. This reduces network latency and makes development faster.
- EDA design artifacts cannot be merged. ClearCase uses the concepts of mastership and reserved checkout to avoid any conflicts and prevent changes being made at one site from being overwritten by someone at another site.
- To efficiently leverage the capability of ClearCase MultiSite and avoid any potential issues, the health of all replicas needs to be monitored. ClearCase provides ClearCase Global Monitoring, a web-based administration console, to simplify the administration of all replicas. It provides a powerful alert system that can be configured to send notifications as email or a text message when the system is in trouble.
As mentioned previously, Cadence design artifacts are binary files that cannot be merged. Therefore, designers mostly work on the same branch to avoid rework or loss of data. With ClearCase MultiSite, if the design files are mastered remotely, then you must request the mastership to be transferred locally and then wait for the synchronization cycle to finish before you can check out the file. But with synchronous request for mastership (SRFM), you can instantly check out a design file and start working on it, but you need to wait for synchronization to finish before you can check the design artifact in again. You can refresh the ClearCase Work Area Manager to check whether the mastership privilege has arrived to check in the artifact. By default, SRFM is enabled for checkout operations (if the VOB is enabled for SRFM), and you need not worry about the mastership of the artifacts. This reduces the waiting time, improves usability, and saves time in development.
In the EDA domain, both hardware design and embedded software are equally important, so this mandates parallel development and seamless integration. Although various SCM tools used by the individual design and development teams fulfill local requirements, the system integration might fail, resulting in higher product development cost and delayed release. For the release engineers, it alleviates a lot of pain if the configuration management tool is same for both hardware design and software artifacts. The labeling and packaging of the artifacts becomes much easier. Also, backtracking the defect to a particular release or build is no longer a herculean task with ClearCase as the SCM software for all of the artifacts. This increases productivity and shortens time to market.
The software and hardware teams in EDA often work in silos, using different tools for configuration and defect management and following different processes. Managing and coordinating projects in such scenarios becomes difficult, because the holistic view of the system is absent. With the ClearCase-Cadence integration, using ClearCase as the common SCM tool for both hardware and software and leveraging the ClearCase integration with ClearQuest results in standardization and unification of processes and tools across the product development lifecycle. This minimizes administrative overhead, and infrastructure costs, thus leading to lower TCO (total cost of ownership).
Base ClearCase and ClearQuest integration with Cadence Design Framework II can be used for better visibility and control of the EDA development lifecycle. Rational ClearQuest also provides capabilities of process automation and reporting. EDA organizations can enforce the process of associating the design changes with change requests.
Figure 4 shows Cadence Design Framework II integrated with base ClearCase and ClearQuest. When the design is checked out or checked in, the integration enforces the association of the operation with a ClearQuest change request.
Figure 4. ClearCase, Cadence, ClearQuest integrated view
Figure 5 shows the ClearCase versions associated with the ClearQuest record.
Figure 5. ClearQuest Web Interface
As we discussed in this article, the ClearCase and Cadence DFII integration provides key features and capabilities to stay competitive in rapidly changing market and enables tight coordination and collaboration between the software and hardware engineers, processes, tools, and terminology. The integration provided by ClearCase with Cadence and the ClearCase Work Area Manager offers a rich user experience to the designers. ClearCase dynamic views and 64-bit support fosters faster development and productivity. ClearCase MultiSite capability helps in managing the GDD challenges, and ClearQuest integration provides traceability with the change management system. Release and project management becomes easier as organizations can define a set of unified processes and tools for their hardware and software development teams.
- For details on supported platforms, installation
instructions, release information, and known issues, see the IBM Technote titled About the
ClearCase integration with Cadence Design Framework II.
- For more information about Rational ClearCase, check
the developerWorks, product overview, and features and benefits pages. You'll find documentation in the ClearCase Information Center. You might also find the Change and Release
Management offerings information helpful.
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Alok K. Singh is a Senior Staff Software Engineer on the IBM Rational Configuration and Change management team. He joined IBM Rational in 2004. Since then, he has worked on various Rational products and been involved in test strategy, test automation, and test execution. He is responsible for leading the ClearCase-Cadence integration testing and also responsible for functional testing and developing test automation for ClearCase.
Ragini Ravishankar is a developer on the ClearCase Native UI and Integrations team and has been with IBM Rational ClearCase team for the past three years. She was part of the ClearCase-Cadence integration v1.1 release team, where she developed test automation for the GDM CLI commands and also contributed to FVT execution.