Before you start
This series provides an understanding of the Cell BE architecture, a basic intuition for programming issues on it, insight into the compiler challenges presented by it, and an understanding of the techniques and solutions proposed by the IBM compiler.
See the previous parts in this series:
- Part 1: Overview: The Cell BE architecture and some of the issues faced in compiler design
- Part 2: Optimizing for the SPE: Optimizations used on the SPEs, such as how the compiler translates scalar code for a vector-only processor
- Part 3: Making the most of SIMD: How a compiler can effectively generate SIMD code for two different architectures (the SPE and VMX), accommodating the various technical constraints of the processors
- Part 4: Partitioning large tasks: How the compiler, or the user, can divide tasks up between the SPEs and the main processor